A PV panel simulator based on a two quadrant DC/DC power converter with a sliding mode controller

The use of a solar photovoltaic (PV) panel simulator can be a valued tool for the design and evaluation of the several components of a photovoltaic system. This simulator is based on power electronic converter controlled in such a way that will behave as a PV panel. Thus, in this paper a PV panel simulator based on a two quadrant DC/DC power converter is proposed. This topology will allow to achieve fast responses, like suddenly changes in the irradiation and temperature. To control the power converter it will be used a fast and robust sliding mode controller. Therefore, with the proposed system I-V curve simulation of a PV panel is obtained. Experimental results from a laboratory prototype are presented in order to confirm the theoretical operation.

Reversible current power supply for fast-field cycling nuclear magnetic resonance equipment

The Fast Field-Cycling Nuclear Magnetic Resonance (FFC-NMR) is a technique used to study the molecular dynamics of different types of materials. The main elements of this equipment are a magnet and its power supply. The magnet used as reference in this work is basically a ferromagnetic core with two sets of coils and an air-gap where the materials' sample is placed. The power supply should supply the magnet being the magnet current controlled in order to perform cycles. One of the technical issues of this type of solution is the compensation of the non-linearities associated to the magnetic characteristic of the magnet and to parasitic magnetic fields. To overcome this problem, this paper describes and discusses a solution for the FFC-NMR power supply based on a four quadrant DC/DC converter.

Remote operation of embedded controllers designed using IOPT Petri-nets

This paper presents a new communication architecture to enable the remote control, monitoring and debug of embedded-system controllers designed using IOPT Petri nets. IOPT Petri nets and the related tools (http://gres.uninova.pt) have been used as a rapid prototyping and development framework, including model-checking, simulation and automatic code generation tools. The new architecture adds remote operation capabilities to the controllers produced by the automatic code generators, enabling quasi-real-time remote debugging and monitoring using the IOPT simulator tool. Furthermore, it enables the creation of graphical user interfaces for remote operation and the development of distributed systems where a Petri net model running on a central system supervises the actions of multiple remote subsystems. © 2015 IEEE.

Matrix converter as unified power flow controller: design and implementation of decoupled direct power controllers

This paper presents the design and implementation of direct power controllers for three-phase matrix converters (MC) operating as Unified Power Flow Controllers (UPFC). Theoretical principles of the decoupled linear power controllers of the MC-UPFC to minimize the cross-coupling between active and reactive power control are established. From the matrix converter based UPFC model with a modified Venturini high frequency PWM modulator, decoupled controllers for the transmission line active (P) and reactive (Q) power direct control are synthesized. Simulation results, obtained from Matlab/Simulink, are presented in order to confirm the proposed approach. Results obtained show decoupled power control, zero error tracking, and fast responses with no overshoot and no steady-state error.

Distributed controllers modeling through Petri nets with multi-asynchronous-channels

This paper proposes the concept of multi-asynchronous-channel for Petri nets. Petri nets extended with multi-asynchronous-channels and time-domains support the specification of distributed controllers, where each controller has a synchronous execution but the global system is asynchronous (globally-asynchronous locally-synchronous systems). Each multi-asynchronous-channel specify the interaction between two or more distributed controllers. These channels, together with the time-domain concept, ensure the creation of network-independent models to support implementations using heterogeneous communication networks. The created models support not only the systems documentation but also their validation and implementation through simulation tools, verification tools, and automatic code generators. An application example illustrates the use of a Petri net class extended with the proposed channels. © 2015 IEEE.

Simulation of a-Si PV system grid connected by boost and inverter

This paper is about a PV system connected to the electric grid by power electronic converters, using classical PI controller. The modelling for the converters emulates the association of a DC-DC boost with a two-level power inverter (TwLI) or three-level power inverter (ThLI) in order to follow the performance of a testing experimental system. Pulse width modulation (PWMo) by sliding mode control (SMCo) associated with space vector modulation (SVMo) is applied to the boost and the inverter. The PV system is described by the five parameters equivalent circuit. Parameter identification and simulation studies are performed for comparison with the testing experimental system.

PV systems linked to the grid: parameter identification with a heuristic procedure

This paper focuses on a PV system linked to the electric grid by power electronic converters, identification of the five parameters modeling for photovoltaic systems and the assessment of the shading effect. Normally, the technical information for photovoltaic panels is too restricted to identify the five parameters. An undemanding heuristic method is used to find the five parameters for photovoltaic systems, requiring only the open circuit, maximum power, and short circuit data. The I- V and the P- V curves for a monocrystalline, polycrystalline and amorphous photovoltaic systems are computed from the parameters identification and validated by comparison with experimental ones. Also, the I- V and the P- V curves under the effect of partial shading are obtained from those parameters. The modeling for the converters emulates the association of a DC-DC boost with a two-level power inverter in order to follow the performance of a testing commercial inverter employed on an experimental system. © 2015 Elsevier Ltd.

Diagnosis of an EPS module

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica e Computadores

Planning smart cities using wireless low energy monitoring systems

Thesis to obtain the Master Degree in Electronics and Telecommunications Engineering

A many-core co-processor for embedded parallel computing on FPGA

Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.

Sparse matrix multiplication on a reconfigurable many-core architecture

Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality reduces the effectiveness of data cache in general-purpose processors quite reducing their performance efficiency when compared to what is achieved with dense matrix multiplication. In this paper, we propose a parallel processing solution for SMVM in a many-core architecture. The architecture is tested with known benchmarks using a ZYNQ-7020 FPGA. The architecture is scalable in the number of core elements and limited only by the available memory bandwidth. It achieves performance efficiencies up to almost 70% and better performances than previous FPGA designs.

Compensação da energia reactiva com minimização de perturbações sobre a rede eléctrica

Trabalho Final de Mestrado para a obtenção de grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

Using dynamic reconfiguration to reduce the area of a JPEG decoder on FPGA

Partial dynamic reconfiguration of FPGAs can be used to implement complex applications using the concept of virtual hardware. In this work we have used partial dynamic reconfiguration to implement a JPEG decoder with reduced area. The image decoding process was adapted to be implemented on the FPGA fabric using this technique. The architecture was tested in a low cost ZYNQ-7020 FPGA that supports dynamic reconfiguration. The results show that the proposed solution needs only 40% of the resources utilized by a static implementation. The performance of the dynamic solution is about 9X slower than the static solution by trading-off internal resources of the FPGA. A throughput of 7 images per second is achievable with the proposed partial dynamic reconfiguration solution.

GPU implementation of a hyperspectral coded aperture algorithm for compressive sensing

This paper presents a new parallel implementation of a previously hyperspectral coded aperture (HYCA) algorithm for compressive sensing on graphics processing units (GPUs). HYCA method combines the ideas of spectral unmixing and compressive sensing exploiting the high spatial correlation that can be observed in the data and the generally low number of endmembers needed in order to explain the data. The proposed implementation exploits the GPU architecture at low level, thus taking full advantage of the computational power of GPUs using shared memory and coalesced accesses to memory. The proposed algorithm is evaluated not only in terms of reconstruction error but also in terms of computational performance using two different GPU architectures by NVIDIA: GeForce GTX 590 and GeForce GTX TITAN. Experimental results using real data reveals signficant speedups up with regards to serial implementation.

Velocity estimation of moving ships using C-band SLC SAR data

A new algorithm for the velocity vector estimation of moving ships using Single Look Complex (SLC) SAR data in strip map acquisition mode is proposed. The algorithm exploits both amplitude and phase information of the Doppler decompressed data spectrum, with the aim to estimate both the azimuth antenna pattern and the backscattering coefficient as function of the look angle. The antenna pattern estimation provides information about the target velocity; the backscattering coefficient can be used for vessel classification. The range velocity is retrieved in the slow time frequency domain by estimating the antenna pattern effects induced by the target motion, while the azimuth velocity is calculated by the estimated range velocity and the ship orientation. Finally, the algorithm is tested on simulated SAR SLC data.