994 resultados para Bias voltage


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This paper examines power quality benchmarks in the electricity supply industry (ESI) and impact of standards for the reduction of voltage dip incidents. The paper considers adherence to particular standards and is supported by several case studies from incidents where voltage dips have been detected and assessed by the power systems division of Scottish Power and where improvements have been implemented to help militate against subsequent incidents.

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An approach is developed for probing the thermodynamics and kinetics of irreversible electrochemical reactions on solid surfaces based on local frequency-voltage spectroscopy. For a model Li-ion conductor surface, two regimes for bias-controlled behavior are demonstrated and ascribed to the difference in the critical nucleus size. The electrostatic and electrochemical phenomena at the tip-surface junction are analyzed. These studies suggest an experimental pathway for exploring local electrochemical activity in solids.

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Spatial variability of bias-dependent electrochemical processes on a (La0.5Sr0.5)(2)CoO4 +/- modified (LaxSr1-x)CoO3- surface is studied using first-order reversal curve method in electrochemical strain microscopy (ESM). The oxygen reduction/evolution reaction (ORR/OER) is activated at voltages as low as 3-4 V with respect to bottom electrode. The degree of bias-induced transformation as quantified by ESM hysteresis loop area increases with applied bias. The variability of electrochemical activity is explored using correlation analysis and the ORR/OER is shown to be activated in grains at relatively low biases, but the final reaction rate is relatively small. At the same time, at grain boundaries, the onset of reaction process corresponds to larger voltages, but limiting reactivity is much higher. The reaction mechanism in ESM of mixed electronic-ionic conductor is further analyzed. These studies both establish the framework for probing bias-dependent electrochemical processes in solids and demonstrate rich spectrum of electrochemical transformations underpinning catalytic activity in cobaltites.

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The presence of mobile ions complicates the implementation of voltage-modulated scanning probe microscopy techniques such as Kelvin probe force microscopy (KPFM). Overcoming this technical hurdle, however, provides a unique opportunity to probe ion dynamics and electrochemical processes in liquid environments and the possibility to unravel the underlying mechanisms behind important processes at the solid–liquid interface, including adsorption, electron transfer and electrocatalysis. Here we describe the development and implementation of electrochemical force microscopy (EcFM) to probe local bias- and time-resolved ion dynamics and electrochemical processes at the solid–liquid interface. Using EcFM, we demonstrate contact potential difference measurements, consistent with the principles of open-loop KPFM operation. We also demonstrate that EcFM can be used to investigate charge screening mechanisms and electrochemical reactions in the probe–sample junction. We further establish EcFM as a force-based imaging mode, allowing visualization of the spatial variability of sample-dependent local electrochemical properties.

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The current research tested a recent development in social psychology, namely 'imagined contact', among young children (n = 123, 5 to 10 years). Children imagined interacting with a physically disabled child, or did not take part in this activity (the control group). Compared with the control group, children who engaged in 'imagined contact' subsequently showed reduced intergroup bias in their general attitude and ratings of warmth and competence. Imagined contact also led to more positive intended friendship behavior towards the disabled, but only among 5 – 6 year olds. This provides partial support for our hypothesis that younger children, perhaps as a result of their lack of outgroup experience, are more likely to benefit from imagined contact. Implications for the development of attitudes towards the disabled, imagined contact theory and the development of classroom-based prejudice-reduction techniques based on imagined contact are discussed.

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Two models that can predict the voltage-dependent scattering from liquid crystal (LC)-based reflectarray cells are presented. The validity of both numerical techniques is demonstrated using measured results in the frequency range 94-110 GHz. The most rigorous approach models, for each voltage, the inhomogeneous and anisotropic permittivity of the LC as a stratified media in the direction of the biasing field. This accounts for the different tilt angles of the LC molecules inside the cell calculated from the solution of the elastic problem. The other model is based on an effective homogeneous permittivity tensor that corresponds to the average tilt angle along the longitudinal direction for each biasing voltage. In this model, convergence problems associated with the longitudinal inhomogeneity are avoided, and the computation efficiency is improved. Both models provide a correspondence between the reflection coefficient (losses and phase-shift) of the LC-based reflectarray cell and the value of biasing voltage, which can be used to design beam scanning reflectarrays. The accuracy and the efficiency of both models are also analyzed and discussed.

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The nonlinear scattering of pulses by periodic stacks of semiconductor layers with magnetic bias has been studied in the self-consistent problem formulation, taking into account mobility of carriers. The three-wave mixing technique has been applied to the analysis of the waveform evolution in the stacks illuminated by two Gaussian pulses with different central frequencies and lengths. The effects of external magnetic bias, and stack physical and geometrical parameters on the properties of the scattered waveforms are discussed. © 2013 IEEE.

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Simple meso-scale capacitor structures have been made by incorporating thin (300 nm) single crystal lamellae of KTiOPO4 (KTP) between two coplanar Pt electrodes. The influence that either patterned protrusions in the electrodes or focused ion beam milled holes in the KTP have on the nucleation of reverse domains during switching was mapped using piezoresponse force microscopy imaging. The objective was to assess whether or not variations in the magnitude of field enhancement at localised “hot-spots,” caused by such patterning, could be used to both control the exact locations and bias voltages at which nucleation events occurred. It was found that both the patterning of electrodes and the milling of various hole geometries into the KTP could allow controlled sequential injection of domain wall pairs at different bias voltages; this capability could have implications for the design and operation of domain wall electronic devices, such as memristors, in the future.

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This paper is concerned with the voltage and reactive power issues surrounding the connection of Distributed Generation (DG) on the low-voltage (LV) distribution network. The presented system-wide voltage control algorithm consists of three stages. Firstly available reactive power reserves are utilized. Then, if required, DG active power output is curtailed. Finally, curtailment of non-critical site demand is considered. The control methodology is tested on a variant of the 13-bus IEEE Node Radial Distribution Test Feeder. The presented control algorithm demonstrated that the distribution system operator (DSO) can maintain voltage levels within a desired statutory range by dispatching reactive power from DG or network devices. The practical application of the control strategy is discussed.

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The aim of this article is to outline types of ‘bias’ across research designs, and consider strategies to minimise bias. Evidence-based nursing, defined as the “process by which evidence, nursing theory, and clinical expertise are critically evaluated and considered, in conjunction with patient involvement, to provide the delivery of optimum nursing care,”1 is central to the continued development of the nursing professional. Implementing evidence into practice requires nurses to critically evaluate research, in particular assessing the rigour in which methods were undertaken and factors that may have biased findings.

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In this paper, we propose a system level design approach considering voltage over-scaling (VOS) that achieves error resiliency using unequal error protection of different computation elements, while incurring minor quality degradation. Depending on user specifications and severity of process variations/channel noise, the degree of VOS in each block of the system is adaptively tuned to ensure minimum system power while providing "just-the-right" amount of quality and robustness. This is achieved, by taking into consideration system level interactions and ensuring that under any change of operating conditions only the "lesscrucial" computations, that contribute less to block/system output quality, are affected. The design methodology applied to a DCT/IDCT system shows large power benefits (up to 69%) at reasonable image quality while tolerating errors induced by varying operating conditions (VOS, process variations, channel noise). Interestingly, the proposed IDCT scheme conceals channel noise at scaled voltages. ©2009 IEEE.

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Today's multi-media electronic era is driven by the increasing demand for small multifunctional devices able to support diverse services. Unfortunately, the high levels of transistor integration and performance required by such devices lead to an unprecedented increase of on-chip power that significantly limits the battery lifetime and even poses reliability concerns. Several techniques have been developed to address the power increase, but voltage over-scaling (VOS) is considered to be one of the most effective ones due to the quadratic dependence of voltage on dynamic power consumption. However, VOS may not always be applicable since it increases the delay in all paths of a system and may limit high performance required by today's complex applications. In addition, application of VOS is further complicated since it increases the variations in transistor characteristics imposed by their tiny size which can lead to large delay and leakage variations, making it difficult to meet delay and power budgets. This paper presents a review of various cross-layer design options that can provide solutions for dynamic voltage over-scaling and can potentially assist in meeting the strict power budgets and yield/quality requirements of future systems. © 2011 IEEE.