929 resultados para bioelettronica, organica, neuroni, PEDOT, PSS, perilene, transistor, elettrochimici, organici, OCST


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Two methodologies were proposed to obtain micro and macroporous chitosan membranes, using two different porogenic agents. The methodologies proved to be effective in control the porosity as well as the pore size. Thus, microporous membranes were obtained through the physical blend of chitosan and polyethylene oxide (PEO) on an 80:20 (m/m) ratio, respectively, followed by the partial PEO solubilization in water at 80 ◦C. Macroporous chitosan membranes with asymmetric morphology were obtained using SiO2 as the porogenic agent. In this case, chiotsan-silica ratios used were 1:1, 1:3 and 1:5 (m/m). Membranes characterization were carried out by SEM (scanning electronic microscopy), X-ray diffraction, Fourier Transform Infrared Spectroscopy (FTIR), Thermal analysis (TG, DTG , DSC and DMTA). Permeability studies were performed using two model drugs: sodium sulfamerazine and sulfametoxipyridazine. By transmission FTIR it was possible to confirm the complete removal of SiO2. The SEM images confirmed the porous formation for both micro and macroporous membranes and also determined their respective sizes. By thermal analysis it was possible to show differences related with water sorption capacity as well as thermal stability for both membranes. DTG and DSC allowed evidencing the PEO presence on microporous membranes. The absorbance x time curves obtained on permeability tests for micro and macroporous membranes showed a linear behavior for both drugs in all range of concentration used. It was also observed, through P versus C curves, an increase in permeability of macroporous membranes according to the increase in porosity and also a decrease on P with increase in drug concentration. The influences of the drug molecular structure, as well as test temperatures were also evaluated

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Some photosensitizers (PSs) used for PACT (Antimicrobial Photodynamic Therapy) show an affinity for bacterial walls and can be photo-activated to cause the desired damage. However, on dentine bacterias may be less susceptible to PACT as a result of limited penetration of the PS. The aim of this study was to evaluate the diffusion of one PS based on hematoporphyrin on dentine structures. Twelve bovine incisors were used. Class III cavities (3 x 3 x 1 mm) were prepared on the mesial or distal surfaces using a diamond bur. Photogem (R) solution at 1 mg/mL (10 uL for each cavity) was used. The experimental Groups were divided according to thickness of dentine remaining and etched or no-etched before the PS application. The fluorescence excitation source was a VelScope (R) system. For image capture a scientific CCD color camera PixelFly (R) was coupled to VelScope. For image acquisition and processing, a computational routine was developed at Matlab (R). Fick's Law was used to obtain the average diffusion coefficient of PS. Differences were found between all Groups. The longitudinal temporal diffusion was influenced by the different times, thickness and acid etching.

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We numerically investigate the long-term dynamics of the Saturnian system by analyzing the Fourier spectra of ensembles of orbits taken around the current orbits of Mimas, Enceladus, Tethys, Rhea and Hyperion. We construct dynamical maps around the current position of these satellites in their respective phase spaces. The maps are the result of a great deal of numerical simulations where we adopt dense sets of initial conditions and different satellite configurations. Several structures associated to the current two-body mean-motion resonances, unstable regions associated to close approaches between the satellites, and three-body mean-motion resonances in the system, are identified in the map. (C) 2010 Elsevier Ltd. All rights reserved.

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A linear, tunable CMOS transconductance stage is introduced. Drain voltage of the input transistor operating in triode region is settled by a regulation loop and a first-order linear relationship between g(m) and a de bias voltage is achieved. In addition to easy tuning, this technique offers circuit simplicity, wide dynamic range, high input and output impedances and low consumption. The transconductor is presented on both single-ended and fully-differential versions. A 3rd-order elliptical low-pass g(m)-C filter with a nominal roll-off frequency of 2MHz is used as one example for the many applications of the proposed transconductor. SPICE data describe circuits performances and filter tunabilily Passband is tuned at a rate of 2.36KHz/mV and good linearity is indicated by a 0.89% THD for an 800mV(p-p) balanced-driven input.

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This paper provides an insight to the trade-off between settling time and power consumption in regulated current mirrors as building parts in micropower current-switching D/A converters. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are evaluated. Raising pole frequencies in micropower circuits, while meeting consumption requirements, is basically limited by parasitic capacitances. For such cases, an alternative is to impose a twin-pole condition in which design constraints are somewhat relieved and settling slightly improved. Relationships between pole frequencies, transistor geometry and bias are established and design guidelines for regulated current mirrors founded. By placing loop-transistors in either weak or strong inversion, small (W/L) ratios are allowed and stray capacitances reduced. Simulated waveforms suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves both simulated and experimental settling performance.

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An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.

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A CMOS low-voltage, wide-swing continuous-time current amplifier is presented. Exhibiting an open-loop architecture, the circuit is composed of transresistance and transconductance stages built upon triode-operating transistors. In addition to an extended dynamic range, the current gain can be programmed within good accuracy by a rapport involving only transistor geometries and tuning biases. Low temperature-drift on gain setting is then expected.In accordance with a 0.35 mum n-well CMOS fabrication process and a single 1.1 V-supply, a balanced current-amplifier is designed for a programmable gain-range of 6 - 34 dB and optimized with respect to dynamic range. Simulated results from PSPICE and Bsim3v3 models indicate, for a 100 muA(pp)-output current, a THD of 0.96 and 1.87% at 1 KHz and 100 KHz, respectively. Input noise is 120 pArootHz @ 10 Hz, with S/N = 63.2 dB @ 1%-THD. At maximum gain, total quiescent consumption is 334 muW. Measurements from a prototyped amplifier reveal a gain-interval of 4.8-33.1 dB and a maximum current swing of 120 muA(pp). The current-amplifier bandwidth is above 1 MHz.

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This paper presents a configurable architecture which was designed to aid in the simulation of ULSI circuits at the transistor level. Elsewhere [1] this architecture was shown to be able to run such simulations several times as fast as standard circuit simulators such as SPICES. In this paper, after describing the overall idea and the the architecture of the system as a whole, I concentrate on the description of the architecture of the processing elements of the computing array.

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Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.

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A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.

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We report a numerical renormalization-group study of the thermoelectric effect in the single-electron transistor (SET) and side-coupled geometries. As expected, the computed thermal conductance and thermopower curves show signatures of the Kondo effect and of Fano interference. The thermopower curves are also affected by particle-hole asymmetry. © 2009 Elsevier B.V. All rights reserved.

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Graphene has been one of the hottest topics in materials science in the last years. Because of its special electronic properties graphene is considered one of the most promising materials for future electronics. However, in its pristine form graphene is a gapless semiconductor, which poses some limitations to its use in some transistor electronics. Many approaches have been tried to create, in a controlled way, a gap in graphene. These approaches have obtained limited successes. Recently, hydrogenated graphene-like structures, the so-called porous graphene, have been synthesized. In this work we show, based on ab initio quantum molecular dynamics calculations, that porous graphene dehydrogenation can lead to a spontaneous formation of a nonzero gap two-dimensional carbon allotrope, called biphenylene carbon (BC). Besides exhibiting an intrinsic nonzero gap value, BC also presents well delocalized frontier orbitals, suggestive of a structure with high electronic mobility. Possible synthetic routes to obtain BC from porous graphene are addressed. © 2012 Materials Research Society.

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The silicon-based gate-controlled lateral bipolar junction transistor (BJT) is a controllable four-terminal photodetector with very high responsivity at low-light intensities. It is a hybrid device composed of a MOSFET, a lateral BJT, and a vertical BJT. Using sufficient gate bias to operate the MOS transistor in inversion mode, the photodetector allows for increasing the photocurrent gain by 106 at low light intensities when the base-emitter voltage is smaller than 0.4 V, and BJT is off. Two operation modes, with constant voltage bias between gate and emitter/source terminals and between gate and base/body terminals, allow for tuning the photoresponse from sublinear to slightly above linear, satisfying the application requirements for wide dynamic range, high-contrast, or linear imaging. MOSFETs from a standard 0.18-μm triple-well complementary-metal oxide semiconductor technology with a width to length ratio of 8 μm /2 μm and a total area of ∼ 500μm2 are used. When using this area, the responsivities are 16-20 kA/W. © 2001-2012 IEEE.

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Human oral cavity is colonized by a wide range of microorganisms, often organized in biofilms. These biofilms are responsible for the pathogenesis of caries and most periodontal diseases. A possible alternative to reduce biofilms is the photodynamic inactivation (PDI). The success of the PDI depends on different factors. The time required by the PS to remain in contact with the target cells prior to illumination is determinant for the technique's efficacy. This study aimed to assess the interaction between the PS and the biofilm prior to the PDI. We used confocal microscopy and FLIM to evaluate the interaction between the PS and the biofilm's microorganism during the pre-irradiation time (PIT). The study of this dynamics can lead to the understanding of why only some PSs are effective and why is necessary a long PIT for some microorganisms. Our results showed that are differences for each PIT. These differences can be the determinate for the efficacy of the PDI. We observed that the microorganism needs time to concentrate and/or transport the PS within the biofilm. We presented preliminary results for biofilms of Candida albicans and Streptococcus mutans in the presence of Curcumin and compared it with the literature. We observed that the effectiveness of the PDI might be directly correlated to the position of the PS with the biofilm. Further analyses will be conducted in order to confirm the potential of FLIM to assess the PS dynamics within the biofilms. © 2013 SPIE.