On optimizing micropower MOS regulated cascode circuits on switched current techniques
Contribuinte(s) |
Universidade Estadual Paulista (UNESP) |
---|---|
Data(s) |
27/05/2014
27/05/2014
01/01/1998
|
Resumo |
Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance. |
Formato |
374-377 |
Identificador |
http://dx.doi.org/10.1109/ISCAS.1998.706952 Proceedings - IEEE International Symposium on Circuits and Systems, v. 2, p. 374-377. 0271-4310 http://hdl.handle.net/11449/65367 10.1109/ISCAS.1998.706952 WOS:000075224600246 2-s2.0-0031645536 |
Idioma(s) |
eng |
Relação |
Proceedings - IEEE International Symposium on Circuits and Systems |
Direitos |
closedAccess |
Palavras-Chave | #Capacitance #Computer simulation #Computer software #Electric currents #Electric network analysis #Electric network synthesis #MOSFET devices #Waveform analysis #Cascode current sources #Regulation-loop frequency #Software package PSPICE #Digital to analog conversion |
Tipo |
info:eu-repo/semantics/conferencePaper |