948 resultados para Architecture Australia
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This paper attempts to prove that in the years 1735 to 1755 Venice was the birthplace and cradle of Modern architectural theory, generating a major crisis in classical architecture traditionally based on the Vitruvian assumption that it imitates early wooden structures in stone or in marble. According to its rationalist critics such as the Venetian Observant Franciscan friar and architectural theorist Carlo Lodoli (1690-1761) and his nineteenth-century followers, classical architecture is singularly deceptive and not true to the nature of materials, in other words, dishonest and fallacious. This questioning did not emanate from practising architects, but from Lodoli himself– a philosopher and educator of the Venetian patriciate – who had not been trained as an architect. The roots of this crisis lay in a new approach to architecture stemming from the new rationalist philosophy of the Enlightenment age with its emphasis on reason and universal criticism.
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Based on the report for the unit “Sociology of New Information Technologies” of the Master on Computer Sciences at FCT/University Nova Lisbon in 2015-16. The responsible of this curricular unit is Prof. António Moniz
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This paper presents a novel architecture of a bidirectional bridgeless interleaved converter for battery chargers of electric vehicles (EVs). The proposed converter is composed by two power stages: an ac-dc converter that is used to interface the power grid and the dc-link, and a dc-dc converter that is used to interface the dc-link and the batteries. The ac-dc converter is an interleaved bridgeless bidirectional boost-type converter and the dc-dc converter is a bidirectional buck-boost-type converter. The proposed converter works with sinusoidal grid current and with high power factor for all operating power levels, and in both grid-to-vehicle (G2V) and vehicle-to-grid (V2G) operation modes. In the paper is described in detail the proposed converter for EV battery chargers: the circuit topology, the principle of operation, the power control theory, and the current control strategy. Several simulation results for both G2V and V2G operation modes are presented.
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The excavations carried out under the rescue “Project of Bracara Augusta” have generated significant amounts of data that enabled the reconstruction of Bracara Augusta urban evolution and the characterization of its buildings and blocks. This paper aims to enhance the existing data related with the domestic architecture of the roman town, which was mainly represented by the houses of domus type.
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Dissertação de mestrado integrado em Engenharia Biomédica (área de especialização em Engenharia Clínica)
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Recently, environmental architecture and sustainable construction has been ranked on top of the worldâ s interests. Making use of natural resources helps in reducing energy consumption and costs associated with the operation of buildings. The current architectural approaches and designs in Palestine are far away from environmental concepts, copying and simulating abroad approaches, without taking into account the culture, climate, and inhabitant's needs. On the contrast, vernacular architecture has achieved environmental concepts and has given suitable approaches and samples - without any need to simulate or copy - which come from people and land. This paper discusses how the Palestinian socio-cultural context shaped the residential vernacular architecture in Palestine, taking the old city of Nablus as a case-study. The research concept depends on analysing and trying to understand the effect of the socio-cultural context on vernacular architecture and trying to reach some rules or understandings of how it works in order to reach a modern environmental dwelling that is suitable to this concept. The research method goes through analysing study cases from the traditional architecture models and the Nablus city is selected as a case study. This analytical and qualitative method can lead to deep understanding for how to benefit from vernacular architecture in Palestine in finding the future environmental residential construction. One of the main findings of this research is to set general and special rules for building sustainable buildings in Palestine from the socio-cultural point view, in order to be a reference for designers, stakeholders, ministry of planning, and municipalities.
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Dissertação de Mestrado (Programa Doutoral em Informática)
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Current data mining engines are difficult to use, requiring optimizations by data mining experts in order to provide optimal results. To solve this problem a new concept was devised, by maintaining the functionality of current data mining tools and adding pervasive characteristics such as invisibility and ubiquity which focus on their users, providing better ease of use and usefulness, by providing autonomous and intelligent data mining processes. This article introduces an architecture to implement a data mining engine, composed by four major components: database; Middleware (control); Middleware (processing); and interface. These components are interlinked but provide independent scaling, allowing for a system that adapts to the user’s needs. A prototype has been developed in order to test the architecture. The results are very promising and showed their functionality and the need for further improvements.
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v.31:no.34(1949)
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Magdeburg, Univ., Fak. für Informatik, Diss., 2011
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Nowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These applications also imply huge implementation challenges. Such example is building a high data rate transceiver which at the same time would have very low power consumption. In this paper we present a prototype of Single Carrier -SC transceiver system, illustrating a brief overview of the baseband design, emphasizing the most important decisions that need to be done. A brief overview of the possible approaches when implementing the equalizer, as the most complex module in the SC transceiver, is also presented. The main focus of this paper is to suggest a parallel architecture for the receiver in a Single Carrier communication system. This would provide higher data rates that the communication system canachieve, for a price of higher power consumption. The suggested architecture of such receiver is illustrated in this paper,giving the results of its implementation in comparison with its corresponding serial implementation.
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The modern computer systems that are in use nowadays are mostly processor-dominant, which means that their memory is treated as a slave element that has one major task – to serve execution units data requirements. This organization is based on the classical Von Neumann's computer model, proposed seven decades ago in the 1950ties. This model suffers from a substantial processor-memory bottleneck, because of the huge disparity between the processor and memory working speeds. In order to solve this problem, in this paper we propose a novel architecture and organization of processors and computers that attempts to provide stronger match between the processing and memory elements in the system. The proposed model utilizes a memory-centric architecture, wherein the execution hardware is added to the memory code blocks, allowing them to perform instructions scheduling and execution, management of data requests and responses, and direct communication with the data memory blocks without using registers. This organization allows concurrent execution of all threads, processes or program segments that fit in the memory at a given time. Therefore, in this paper we describe several possibilities for organizing the proposed memory-centric system with multiple data and logicmemory merged blocks, by utilizing a high-speed interconnection switching network.
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Advances in computer memory technology justify research towards new and different views on computer organization. This paper proposes a novel memory-centric computing architecture with the goal to merge memory and processing elements in order to provide better conditions for parallelization and performance. The paper introduces the architectural concepts and afterwards shows the design and implementation of a corresponding assembler and simulator.
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v.31:no.18(1947)