998 resultados para silicon detectors


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A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) was designed and fabricated with standard 0.6 mu m CMOS technology. This OEIC circuit consisted of an integrated double photodiode detector (DPD) and a preamplifier. The DPD detector exhibited high bandwidth by screening the bulk-generated diffusion carriers and suppressing the slow diffusion tail effect. The preamplifier exploited the regulated cascode (RGC) configuration as the input stage of receiver, thus isolating the influence of photodiode capacitance and input parasitic capacitance on bandwidth. Testing results showed that the bandwidth of OEIC was 700MHz, indicating the bit rate of 1Gb/s was achieved.

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Oxidizing thick porous silicon layer into silicon dioxide is a timesaving and low-cost process for producing thick silicon dioxide layer used in silicon-based optical waveguide devices. The solution of H2O2 is proposed to post-treat thick porous silicon (PS) films. The prepared PS layer as the cathode is applied about 10 mA/cm(2) current in mixture of ethanol, HF, and H2O2 solutions, in order to improve the stability and the smoothness of the surface. With the low-temperature dry-O-2 pre-oxidizations and high-temperature wet O-2 oxidizations process, a high-quality SiO2 30 mu m thickness layer that fit for the optical waveguide device was prepared. The SEM images show significant improved smoothness on the surface of oxidized PS thick films, the SiO2 film has a stable and uniformity reflex index that measured by the prism coupler, the uniformity of the reflex index in different place of the wafer is about 0.0003.

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Optoelectronic packaging has become a most important factor that influences the final performance and cost of the module. In this paper, low microwave loss coplanar waveguide(CPW) on high resistivity silicon(HRS) and precise V groove in silicon substrate were successfully fabricated. The microwave attenuation of the CPW made on HRS with the simple process is lower than 2 dB/cm in the frequency range of 0 similar to 26GHz, and V groove has the accuracy in micro level and smooth surface. These two techniques built a good foundation for high frequency packaging and passive coupling of the optoelectronic devices. Based on these two techniques, a simple high resistivity silicon substrate that integrated V groove and CPW for flip-chip packaging of lasers was completed. It set a good example for more complicate optoelectronic packaging.

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Diphasic silicon films (nc-Si/a-Si:H) have been prepared by a new regime of plasma enhanced chemical vapour deposition in the region adjacent of phase transition from amorphous to microcrystalline state. Comparing to the conventional amorphous silicon (a-Si:H), the nc-Si/a-Si:H has higher photoconductivity (sigma(ph)), better stability, and a broader light spectral response range in the longer wavelength range. It can be found from Raman spectra that there is a notable improvement in the medium range order. The blue shift for the stretching mode and red shift for the wagging mode in the IR spectra also show the variation of the microstructure. By using this kind of film as intrinsic layer, a p-i-n junction solar cell was prepared with the initial efficiency of 8.51 % and a stabilized efficiency of 8.01% (AM 1.5, 100 mw/cm(2)) at room temperature. (c) 2006 Published by Elsevier B.V.

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Current-based microscopic defect analysis method such as current deep level transient spectroscopy (I-DLTS) and thermally stimulated current have been developed over the years at Brookhaven National Laboratory (BNL) for the defect characterizations on heavily irradiated (Phi(n) >= 10(13) n/cm(2)) high-resistivity (>= 2 k Omega cm) Si sensors/detectors. The conventional DLTS method using a capacitance transient is not valid on heavily irradiated high-resistivity Si sensors/detectors. A new optical filling method, using lasers with various wavelengths, has been applied, which is more efficient and suitable than the traditional voltage-pulse filling. Optimum defect-filling schemes and conditions have been suggested for heavily irradiated high-resistivity Si sensors/detectors. (c) 2006 Published by Elsevier Ltd.

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The open circuit voltage (V-oc) of n-i-p type hydrogenated amorphous silicon (a-Si:H) solar cells has been examined by means of experimental and numerical modeling. The i- and p-layer limitations on V-oc are separated and the emphasis is to identify the impact of different kinds of p-layers. Hydrogenated protocrystalline, nanocrystalline and microcrystalline silicon p-layers were prepared and characterized using Raman spectroscopy, high resolution transmission electron microscopy (HRTEM), optical transmittance and activation energy of dark-conductivity. The n-i-p a-Si:H solar cells incorporated with these p-layers were comparatively investigated, which demonstrated a wide variation of V-oc from 1.042 V to 0.369 V, under identical i- and n-layer conditions. It is found that the nanocrystalline silicon (nc-Si:H) p-layer with a certain nanocrystalline volume fraction leads to a higher V-oc. The optimum p-layer material for n-i-p type a-Si:H solar cells is not found at the onset of the transition between the amorphous to mixed phases, nor is it associated with a microcrystalline material with a large grain size and a high volume fraction of crystalline phase. (c) 2006 Elsevier B.V. All rights reserved.

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A wide bandgap and highly conductive p-type hydrogenated nanocrystalline silicon (nc-Si:H) window layer was prepared with a conventional RF-PECVD system under large H dilution condition, moderate power density, high pressure and low substrate temperature. The optoelectrical and structural properties of this novel material have been investigated by Raman and UV-VIS transmission spectroscopy measurements indicating that these films are composed of nanocrystallites embedded in amorphous SiHx matrix and with a widened bandgap. The observed downshift of the optical phonon Raman spectra (514.4 cm(-1)) from crystalline Si peak (521 cm(-1)) and the widening of the bandgap indicate a quantum confinement effect from the Si nanocrystallites. By using this kind of p-layer, a-Si:H solar cells on bare stainless steel foil in nip sequence have been successfully prepared with a V c of 0.90 V, a fill factor of 0.70 and an efficiency of 9.0%, respectively. (c) 2006 Elsevier B.V. All rights reserved.

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A series of diphasic nanocrystalline silicon films and solar cells was prepared using different hydrogen dilution ratios of silane by very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD). It was observed that after light soaking the open circuit voltage (V-oc) of the diphasic solar cells increased, while that of amorphous silicon solar cells decreased. Raman scattering spectroscopy was performed on the series of diphasic silicon films before and after light soaking. It was found that after light soaking the nanostruclures in the diphasic nanocrystalline silicon films were changed. Both the grain sizes and grain volume fraction reduced, while the grain boundary components increased. These results provide experimental evidence for the conjecture that the light-induced increase in V-oc of the diphasic nanocrystalline solar cells might be induced by the changes in the nanostructure of the intrinsic layer. (c) 2006 Elsevier B.V. All rights reserved.

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Hydrogenated nanocrystalline silicon (nc-Si:H) n-layers have been used to prepare heterojunction solar cells on flat p-type crystalline silicon (c-Si) wafers. The nc-Si:H n-layers were deposited by radio-frequency (RF) plasma enhanced chemical vapor deposition (PECVD), and characterized using Raman spectroscopy, optical transmittance and activation energy of dark-conductivity. The nc-Si:H n-layers obtained comprise fine grained nanocrystallites embedded in amorphous matrix, which have a wider bandgap and a smaller activation energy. Heterojunction solar cells incorporated with the nc-Si n-layer were fabricated using configuration of Ag (100 nm)/1T0 (80 nm)/n-nc-Si:H (15 nm)/buffer a-Si:H/p-c-Si (300 mu m)/Al (200 nm), where a very thin intrinsic a-Si:H buffer layer was used to passivate the p-c-Si surface, followed by a hydrogen plasma treatment prior to the deposition of the thin nanocrystalline layer. The results show that heterojunction solar cells subjected to these surface treatments exhibit a remarkable increase in the efficiency, up to 14.1% on an area of 2.43 cm(2). (c) 2006 Elsevier B.V. All rights reserved.

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zhangdi于2010-03-29批量导入

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A silicon light emitting device is designed and simulated. It is fabricated in 0.6 mum standard CMOS technology. The device can give more than 1 muW optical power of visible light under reverse breakdown. The device can be turned on at a bias of 0.88 V and work in a large range of voltage: 1.0-6.0 V The external electrical-optical conversion efficiency is more than 10(-6). The optical spectrum of the device is between 540-650 nm, which have a clear peak near 580 nm. The emission mechanism can be explained by a hot carrier direct recombination model.

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Si-based optoelectronic devices, including stimulated emission from Si diode, 1.3 and 1.5mum SiGe photodetector with quantum structures, 1GHz MOS optical modulator, SOI optical switch matrix and wavelength tunable filter are reviewed in the paper.

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A V-shaped solar cell module consists of two tilted mono-crystalline cells [J. Li, China Patent No. 200410007708.6 (March, 2004)]. The angle included between the two tilted cells is 90 degrees. The two cells were fabricated by using polished silicon wafers. The scheme of both-side polished wafers has been proposed to reduce optical loss. Compared to solar cells in a planar way, the V-shaped structure enhances external quantum efficiency and leads to an increase of 15% in generation photocurrent density. The following three kinds of trapped photons are suggested to contribute to the increase: (1) infrared photons converted from visible photons due to a transformation mechanism, (2) photons reflected from top contact metal, and (3) a residual reflection which can not be eliminated by an antireflection coating.

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In this paper.. the status and limits in the development of the silicon microelectronics industry are presented briefly. The key countermeasures given are use of the new structure materials and the new device structures.

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In this paper, a new capacitive microphone fabrication technology is proposed. It describes using the oxidized porous silicon sacrificial technology to make air gap and using KOH etching technique to make the backplate containing acoustic holes based on the principle that the heavy p(+)-doping silicon can be nearly etched in KOH solution. The innovation of the method is using oxidized porous silicon technology. The sensitivity of the fabricated microphone is from -55dB ( 1.78mV/Pa) to -45dB (5.6mV/Pa) in the frequency range of 500Hz to 25kHz. Its cut-off frequency is higher than 20kHz.