940 resultados para Electric circuits.
Resumo:
This paper presents a high speed current mode CMOS comparator. The comparator was optimized for allows wide range input current 1mA, ±0.5uA resolution and has fast response. This circuit was implemented with 0.8μm CMOS n-well process with area of 120μm × 105μm and operates with 3.3V(±1.65V).
Resumo:
A CMOS audio-equalizer based on a parallel-array of 2nd-order bandpass-sections is presented and realized with triode transconductors. It has a programmable 12db-boost/cut on each of its three decade-bands, easily achieved through the linear dependence of gm on VDS. In accordance with a 0.8μm n-well double-metal fabrication process, a range of simulations supports theoretical analysis and circuit performance at different boost/cut scenarios. For VDD=3.3V, fullboosting stand-by prover consumption is 1.05mW. THD=-42.61dB@1Vpp and may be improved by balanced structures. Thermal- and I/f-noise spectral densities are 3.2μV/Hz12 and 18.2μV/Hz12@20Hz, respectively, for a dynamic range of 52.3dB@1Vpp. The equalizer effective area is 2.4mm2. The drawback of the existing transmission-zero due to the feedthrough-capacitance of a triode input-device is also addressed. The proposed topology can be extended to the design of more complex graphic-equalizers and hearing-aids.
Resumo:
A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity; and wide range of programmability, are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40dB programmablegain audio-amplifier is designed. Its performance is supported by a range of simulations. For VDD=1.8V and 20dB-nominal gain, one has Av=19.97dB, f3db=770KHz and quiescent dissipation of 378μW. Over temperatures from -25°C to 125°C, the 0. ldB-bandwidth is 52KHz. Dynamic-range is optimized to 57.2dB and 42.6dB for gains of 20dB and 40dB, respectively. THD figures correspond to -60.6dB@Vout= 1Vpp and -79.7dB@Vout= 0.5 Vpp. A nearly constant bandwidth for different gains is also attained.
Resumo:
This work proposes a new isolated high power factor 12kW power supply based on an 18-pulse transformer arrangement. Three full-bridge converters are used for isolation and to balance the DC-link currents, without current sensing or a current controller. The topology provides a regulated DC output with a very simple control strategy. Simulation and experimental results are presented in this paper.
Resumo:
This paper describes a analog implementation of radial basis neural networks (RBNN) in BiCMOS technology. The RBNN uses a gaussian function obtained through the characteristic of the bipolar differential pair. The gaussian parameters (gain, center and width) is changed with programmable current source. Results obtained with PSPICE software is showed.
Resumo:
The pulsed electric acoustic technique, PEA, has been usually applied to probe space charge profiles in polymers. Preliminary PEA results using a ferroelectric ceramic are presented. If the reverse applied electric field i of the order of the coercive field the switching polarization process occurs in a period larger than hundreds of seconds. Such a slow process allows one to use the PEA setup to follow the polarization switching dynamics and determine the electric field profile. The PEA signal obtained in the lead zirconate-titanate doped with niobium ceramic, PZTN, indicates that the polarization distribution and field are not uniform during the switching period. We were also able to observe that the acoustic wave velocity and attenuation depends on the stage of the polarization switching, which agrees with results obtained using the ultrasonic method.
Resumo:
A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.
Resumo:
We present results of thermally stimulated depolarization current (TSDC) measurements in synthetic and natural alexandrite, which show TSDC bands related to the presence of electric dipoles in both types of samples. Synthetic material shows a wide TSDC band with a peak at 179 K, which can be fitted by two distinct relaxing dipole distributions. For natural alexandrite the TSDC band has a maximum around 195 K and can be fitted by three different distributions. Both samples present one of the calculated curves with a peak about 179 K, with activation energy of 0.57 eV and constant relaxation time of 1 × 10-14 sec. Photo-induced TSDC shows that TSDC bands can also be generated by simultaneous application of light and an electric field at 77 K.
Resumo:
The pulsed electric acoustic technique, PEA, have been usually applied to probe space charge profiles in polymers. In this work we show preliminary results obtained with lead zirconate-titanate and niobium, PZTN, ferroelectric ceramic samples. Experiments showed that induced charge densities on sample electrodes are mainly due to the ferroelectric polarization of the sample. We present results of the typical PEA response and the procedure to deconvolute the signal in order to obtain the charge densities and the electric field profiles. The PEA setup allows us to show a non-uniform polarization during ferroelectric switching.
Resumo:
This work presents a procedure for electric load forecasting based on adaptive multilayer feedforward neural networks trained by the Backpropagation algorithm. The neural network architecture is formulated by two parameters, the scaling and translation of the postsynaptic functions at each node, and the use of the gradient-descendent method for the adjustment in an iterative way. Besides, the neural network also uses an adaptive process based on fuzzy logic to adjust the network training rate. This methodology provides an efficient modification of the neural network that results in faster convergence and more precise results, in comparison to the conventional formulation Backpropagation algorithm. The adapting of the training rate is effectuated using the information of the global error and global error variation. After finishing the training, the neural network is capable to forecast the electric load of 24 hours ahead. To illustrate the proposed methodology it is used data from a Brazilian Electric Company. © 2003 IEEE.
Resumo:
This paper discusses a design approach for a high-Q low-sensitivity OTA-C biquad bandpass section. An optimal relationship is established between transconductances defining the differenceβ - γ in the Q-factor denominator, setting the Q-sensitivity to tuning voltages around unity. A 30-MHz filter was designed based on a 0.35μn CMOS process and VDD=3.3V. A range of circuit simulation supports the theoretical analysis. Q-factor spans from 20.5 to 60, while ensuring filter stability along the tuning range. Although a Mode-operating OTA is used, the procedure can be extended to other types of transconductor.
Resumo:
A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.
Resumo:
A low-voltage low-power 2nd-order CMOS pseudo-differential bump-equalizer is presented. Its topology comprises a bandpass section with adjustable center frequency and quality factor, together with a programmable current amplifier. The basic building blocks are triode-operating transconductors, tunable by means of either a DC voltage or a digitally controlled current divider. The bump-equalizer as part of a battery-operated hearing aid device is designed for a 1.4V-supply and a 0.35μm CMOS fabrication process. The circuit performance is supported by a set of simulation results, which indicates a center frequency from 600Hz to 2.4kHz, 1≤Q≤5, and an adjustable gain within ±6dB at center frequency. The filter dynamic range lies around 40dB. Quiescent consumption is kept below 12μW for any configuration of the filter.
Resumo:
An electronic ballast for multiple tubular fluorescent lamps is presented in this paper. The proposed structure features high power-factor, dimming capability, and soft-switching to the semiconductor devices operated in high frequencies. A Zero-Current-Switching - Pulse-Width-Modulated (ZCS-PWM) SEPIC converter composes the rectifying stage, controlled by the instantaneous average input current technique, performing soft-commutations and high input power factor. Regarding the inverting stage, it is composed by a classical resonant Half-Bridge converter, associated to Series Parallel-Loaded Resonant (SPLR) filters. The dimming control technique employed in this Half-Bridge inverter is based on the phase-shift in the current processed through the sets of filter + lamp. In addition, experimental results are shown in order to validate the developed analysis.
Resumo:
In this paper a method for solving the Short Term Transmission Network Expansion Planning (STTNEP) problem is presented. The STTNEP is a very complex mixed integer nonlinear programming problem that presents a combinatorial explosion in the search space. In this work we present a constructive heuristic algorithm to find a solution of the STTNEP of excellent quality. In each step of the algorithm a sensitivity index is used to add a circuit (transmission line or transformer) to the system. This sensitivity index is obtained solving the STTNEP problem considering as a continuous variable the number of circuits to be added (relaxed problem). The relaxed problem is a large and complex nonlinear programming and was solved through an interior points method that uses a combination of the multiple predictor corrector and multiple centrality corrections methods, both belonging to the family of higher order interior points method (HOIPM). Tests were carried out using a modified Carver system and the results presented show the good performance of both the constructive heuristic algorithm to solve the STTNEP problem and the HOIPM used in each step.