A Time-based Low Voltage Body Temperature Monitoring Unit

A neonatal temperature monitoring system operating in subthreshold regime that utilizes time mode signal processing is presented. Resistance deviations in a thermistor due to temperature variations are converted to delay variations that are subsequently quantized by a Delay measurement unit (DMU). The DMU does away with the need for any analog circuitry and is synthesizable entirely from digital logic. An FPGA implementation of the system demonstrates the viability of employing time mode signal processing, and measured results show that temperature resolution better than 0.1 degrees C can be achieved using this approach.

Series-connected substrate-integrated lead-carbon hybrid ultracapacitors with voltage-management circuit

Cell voltage for a fully charged-substrate-integrated lead-carbon hybrid ultracapacitor is about 2.3 V. Therefore, for applications requiring higher DC voltage, several of these ultracapacitors need to be connected in series. However, voltage distribution across each series-connected ultracapacitor tends to be uneven due to tolerance in capacitance and parasitic parallel-resistance values. Accordingly, voltage-management circuit is required to protect constituent ultracapacitors from exceeding their rated voltage. In this study, the design and characterization of the substrate-integrated lead-carbon hybrid ultracapacitor with co-located terminals is discussed. Voltage-management circuit for the ultracapacitor is presented, and its effectiveness is validated experimentally.

Low-frequency dc bus ripple cancellation in single phase pulse-width modulation inverters

This study presents a topology for a single-phase pulse-width modulation (PWM) converter which achieves low-frequency ripple reduction in the dc bus even when there are grid frequency variations. A hybrid filter is introduced to absorb the low-frequency current ripple in the dc bus. The control strategy for the proposed filter does not require the measurement of the dc bus ripple current. The design criteria for selecting the filter components are also presented in this study. The effectiveness of the proposed circuit has been tested and validated experimentally. A smaller dc-link capacitor is sufficient to keep the low-frequency bus ripple to an acceptable range in the proposed topology.

New single-source precursor for bismuth sulfide and its use as low-cost counter electrode material for dye-sensitized solar cells

One new homoleptic Bi(dtc)(3)] (1) (dtc = 4-hydroxypiperdine dithiocarbamate) has been synthesized and characterized by microanalysis, IR, UV-Vis, H-1 and C-13 spectroscopy and X-ray crystallography. The photoluminescence spectrum for the compound in DMSO solution was recorded. The crystal structure of 1 displayed distorted octahedral geometry around the Bi(III) center bonded through sulfur atoms of the dithiocarbamate ligands. TGA indicates that the compound decomposes to a Bi and Bi-S phase system. The Bi and Bi-S obtained from decomposition of the compound have been characterized by pXRD, EDAX and SEM. Solvothermal decomposition of 1 in the absence and presence of two different capping agents yielded three morphologically different Bi2S3 systems which were deployed as counter-electrode in dye-sensitized solar cells (DSSCs). (C) 2015 Elsevier B.V. All rights reserved.

Copper-Catalyzed Direct Transformation of Secondary Allylic and Benzylic Alcohols into Azides and Amides: An Efficient Utility of Azide as a Nitrogen Source

A mild and convenient method for the synthesis of amides has been explored by using secondary alcohols, Cu(ClO4)(2)6H(2)O as a catalyst, and trimethylsilyl azide (TMSN3) as a nitrogen source in the presence of 2,3-dichloro-5,6-dicyano-p-benzoquinone (DDQ) at ambient temperature. This method has been successfully adapted to the preparation of azides directly from their corresponding alcohols and offers excellent chemoselectivity in the formation of -halo azides and the azidation of allylic alcohols in the presence of a benzyl alcohol moiety. In addition, this strategy provides an opportunity to synthesize azides that can serve as precursors to -amino acids.

Sulfate Chemistry for High-Voltage Insertion Materials: Synthetic, Structural and Electrochemical Insights

Rechargeable batteries based on Li and Na ions have been growing leaps and bounds since their inception in the 1970s. They enjoy significant attention from both the fundamental science point of view and practical applications ranging from portable electronics to hybrid vehicles and grid storage. The steady demand for building better batteries calls for discovery, optimisation and implementation of novel positive insertion (cathode) materials. In this quest, chemists have tried to unravel many future cathode materials by taking into consideration their eco-friendly synthesis, material/process economy, high energy density, safety, easy handling and sustainability. Interestingly, sulfate-based cathodes offer a good combination of sustainable syntheses and high energy density owing to their high-voltage operation, stemming from electronegative SO42- units. This review delivers a sneak peak at the recent advances in the discovery and development of sulfate-containing cathode materials by focusing on their synthesis, crystal structure and electrochemical performance. Several family of cathodes are independently discussed. They are 1) fluorosulfates AMSO(4)F], 2) bihydrated fluorosulfates AMSO(4)F2H(2)O], 3) hydroxysulfate AMSO(4)OH], 4) bisulfates A(2)M(SO4)(2)], 5) hydrated bisulfates A(2)M(SO4)(2)nH(2)O], 6) oxysulfates Fe-2(SO4)(2)O] and 7) polysulfates A(2)M(2)(SO4)(3)]. A comparative study of these sulfate-based cathodes has been provided to offer an outlook on the future development of high-voltage polyanionic cathode materials for next-generation batteries.

A zero charge-pump mismatch current tracking loop for reference spur reduction in PLLs

The charge-pump (CP) mismatch current is a dominant source of static phase error and reference spur in the nano-meter CMOS PLL implementations due to its worsened channel length modulation effect. This paper presents a charge-pump (CP) mismatch current reduction technique utilizing an adaptive body bias tuning of CP transistors and a zero CP mismatch current tracking PLL architecture for reference spur suppression. A chip prototype of the proposed circuit was implemented in 0.13 mu m CMOS technology. The frequency synthesizer consumes 8.2 mA current from a 13 V supply voltage and achieves a phase noise of -96.01 dBc/Hz @ 1 MHz offset from a 2.4 GHz RF carrier. The charge-pump measurements using the proposed calibration technique exhibited a mismatch current of less than 0.3 mu A (0.55%) over the VCO control voltage range of 0.3-1.0 V. The closed loop measurements show a minimized static phase error of within +/- 70 ps and a similar or equal to 9 dB reduction in reference spur level across the PLL output frequency range 2.4-2.5 GHz. The presented CP calibration technique compensates for the DC current mismatch and the mismatch due to channel length modulation effect and therefore improves the performance of CP-PLLs in nano-meter CMOS implementations. (C) 2015 Elsevier Ltd. All rights reserved.

Environmental monitoring of bacterial contamination and antibiotic resistance patterns of the fecal coliforms isolated from Cauvery River, a major drinking water source in Karnataka, India

The present study focuses prudent elucidation of microbial pollution and antibiotic sensitivity profiling of the fecal coliforms isolated from River Cauvery, a major drinking water source in Karnataka, India. Water samples were collected from ten hotspots during the year 2011-2012. The physiochemical characteristics and microbial count of water samples collected from most of the hotspots exhibited greater biological oxygen demand and bacterial count especially coliforms in comparison with control samples (p <= 0.01). The antibiotic sensitivity testing was performed using 48 antibiotics against the bacterial isolates by disk-diffusion assay. The current study showed that out of 848 bacterial isolates, 93.51 % (n=793) of the isolates were found to be multidrug-resistant to most of the current generation antibiotics. Among the major isolates, 96.46 % (n=273) of the isolates were found to be multidrug-resistant to 30 antibiotics and they were identified to be Escherichia coli by 16S rDNA gene sequencing. Similarly, 93.85 % (n=107), 94.49 % (n=103), and 90.22 % (n=157) of the isolates exhibited multiple drug resistance to 32, 40, and 37 antibiotics, and they were identified to be Enterobacter cloacae, Pseudomonas trivialis, and Shigella sonnei, respectively. The molecular studies suggested the prevalence of blaTEM genes in all the four isolates and dhfr gene in Escherichia coli and Sh. sonnei. Analogously, most of the other Gram-negative bacteria were found to be multidrug-resistant and the Gram-positive bacteria, Staphylococcus spp. isolated from the water samples were found to be methicillin and vancomycin-resistant Staphylococcus aureus. This is probably the first study elucidating the bacterial pollution and antibiotic sensitivity profiling of fecal coliforms isolated from River Cauvery, Karnataka, India.

Voice source characterization using pitch synchronous discrete cosine transform for speaker identification

A characterization of the voice source (VS) signal by the pitch synchronous (PS) discrete cosine transform (DCT) is proposed. With the integrated linear prediction residual (ILPR) as the VS estimate, the PS DCT of the ILPR is evaluated as a feature vector for speaker identification (SID). On TIMIT and YOHO databases, using a Gaussian mixture model (GMM)-based classifier, it performs on par with existing VS-based features. On the NIST 2003 database, fusion with a GMM-based classifier using MFCC features improves the identification accuracy by 12% in absolute terms, proving that the proposed characterization has good promise as a feature for SID studies. (C) 2015 Acoustical Society of America

Low-Order Harmonic Suppression for Open-End Winding IM With Dodecagonal Space Vector Using a Single DC-Link Supply

This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique.

Robust, metallic Pd17Se15 and Pd7Se4 phases from a single source precursor and their use as counter electrodes in dye sensitized solar cells

Thin films of conducting palladium selenide phases (Pd17Se15 and Pd7Se4) are prepared using a single source molecular precursor by thermolysis. Varying the mole ratios of palladium and selenium precursors results in palladium organo-selenolate complexes which on thermolysis at different temperatures yield Pd17Se15 and Pd7Se4 phases that are very stable and adherent to the substrate. The organo-selenolate complexes are characterized using small angle XRD, Se-77 NMR and thermogravimetric analysis (TGA). The palladium selenide films are characterized by various techniques such as XRD, XPS, TEM and SEM. Electrical conductivities of the films are determined using the four probe method. The strong adherence of the films to glass substrates coupled with high corrosion resistant behavior towards strong acid and alkaline environments render them to be very effective as electrocatalysts. The catalytic activity towards the I-3(-)/I- redox couple, which is an important reaction in the regeneration of the dye in a dye-sensitized solar cell, is studied. Between the two phases, the Pd17Se15 film shows superior activity as the counter electrode for dye sensitized solar cells with a photocurrent conversion efficiency of 7.45%.

Effects of site stiffness and source to receiver distance on surface wave tests' results

By using six 4.5 Hz geophones, surface wave tests were performed on four different sites by dropping freely a 65 kg mass from a height of 5 m. The receivers were kept far away from the source to eliminate the arrival of body waves. Three different sources to nearest receiver distances (S), namely, 46 m, 56 m and 66 m, were chosen. Dispersion curves were drawn for all the sites. The maximum wavelength (lambda(max)), the maximum depth (d(max)) up to which exploration can be made and the frequency content of the signals depends on the site stiffness and the value of S. A stiffer site yields greater values of lambda(max) and d(max). For stiffer sites, an increase in S leads to an increase in lambda(max). The predominant time durations of the signals increase from stiffer to softer sites. An inverse analysis was also performed based on the stiffness matrix approach in conjunction with the maximum vertical flexibility coefficient of ground surface to establish the governing mode of excitation. For the Site 2, the results from the surface wave tests were found to compare reasonably well with that determined on the basis of cross boreholes seismic tests. (C) 2015 Elsevier Ltd. All rights reserved.

Thermal test method for high power three-phase grid-connected inverters

Semiconductor device junction temperatures are maintained within datasheet specified limits to avoid failure in power converters. Burn-in tests are used to ensure this. In inverters, thermal time constants can be large and burn-in tests are required to be performed over long durations of time. At higher power levels, besides increased production cost, the testing requires sources and loads that can handle high power. In this study, a novel method to test a high power three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources and loads. Only energy corresponding to the losses is consumed. The test is done by circulating rated current within the three legs of the inverter. All the phase legs being loaded, the method can be used to test the inverter in both cases of a common or independent cooling arrangement for the inverter phase legs. Further, the method can be used with different inverter configurations - three- or four-wire and for different pulse width modulation (PWM) techniques. The method has been experimentally validated on a 24 kVA inverter for a four-wire configuration that uses sine-triangle PWM and a three-wire configuration that uses conventional space vector PWM.

Part I: High-Voltage MOS Device Design for Improved Static and RF Performance

In this paper, for the first time, the key design parameters of a shallow trench isolation-based drain-extended MOS transistor are discussed for RF power applications in advanced CMOS technologies. The tradeoff between various dc and RF figures of merit (FoMs) is carefully studied using well-calibrated TCAD simulations. This detailed physical insight is used to optimize the dc and RF behavior, and our work also provides a design window for the improvement of dc as well as RF FoMs, without affecting the breakdown voltage. An improvement of 50% in R-ON and 45% in RF gain is achieved at 1 GHz. Large-signal time-domain analysis is done to explore the output power capability of the device.

An Open-End winding IM drive with Multilevel 12-sided Polygonal Vectors with Symmetric Triangles

Multilevel inverters with hexagonal voltage space vector structures have improved performance of induction motor drives compared to that of the two level inverters. Further reduction in the torque ripple on the motor shaft is possible by using multilevel dodecagonal (12-sided polygon) voltage space vector structures. The advantages of dodecagonal voltage space vector based PWM techniques are the complete elimination of fifth and seventh harmonics in phase voltages for the full modulation range and the extension of linear modulation range. This paper proposes an inverter circuit topology capable of generating multilevel dodecagonal voltage space vectors with symmetric triangles, by cascading two asymmetric three level inverters with isolated H-Bridges. This is made possible by proper selection of DC link voltages and the selection of resultant switching states for the inverters. In this paper, a simple PWM timing calculation method is proposed. Experimental results have also been presented in this paper to validate the proposed concept.