Trends Of CPU, GPU and FPGA for high-performance computing

Floating-point computing with more than one TFLOP of peak performance is already a reality in recent Field-Programmable Gate Arrays (FPGA). General-Purpose Graphics Processing Units (GPGPU) and recent many-core CPUs have also taken advantage of the recent technological innovations in integrated circuit (IC) design and had also dramatically improved their peak performances. In this paper, we compare the trends of these computing architectures for high-performance computing and survey these platforms in the execution of algorithms belonging to different scientific application domains. Trends in peak performance, power consumption and sustained performances, for particular applications, show that FPGAs are increasing the gap to GPUs and many-core CPUs moving them away from high-performance computing with intensive floating-point calculations. FPGAs become competitive for custom floating-point or fixed-point representations, for smaller input sizes of certain algorithms, for combinational logic problems and parallel map-reduce problems. © 2014 Technical University of Munich (TUM).

Virtual laboratory for educational environments

In this paper a new simulation environment for a virtual laboratory to educational proposes is presented. The Logisim platform was adopted as the base digital simulation tool, since it has a modular implementation in Java. All the hardware devices used in the laboratory course was designed as components accessible by the simulation tool, and integrated as a library. Moreover, this new library allows the user to access an external interface. This work was motivated by the needed to achieve better learning times on co-design projects, based on hardware and software implementations, and to reduce the laboratory time, decreasing the operational costs of engineer teaching. Furthermore, the use of virtual laboratories in educational environments allows the students to perform functional tests, before they went to a real laboratory. Moreover, these functional tests allow to speed-up the learning when a problem based approach methodology is considered. © 2014 IEEE.

FPGA-based architecture for hyperspectral unmixing

This paper proposes an FPGA-based architecture for onboard hyperspectral unmixing. This method based on the Vertex Component Analysis (VCA) has several advantages, namely it is unsupervised, fully automatic, and it works without dimensionality reduction (DR) pre-processing step. The architecture has been designed for a low cost Xilinx Zynq board with a Zynq-7020 SoC FPGA based on the Artix-7 FPGA programmable logic and tested using real hyperspectral datasets. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low cost embedded systems.

Conceção de um tutorial de Iniciação ao co-projeto de Hardware/software

A crescente evolução dos dispositivos contendo circuitos integrados, em especial os FPGAs (Field Programmable Logic Arrays) e atualmente os System on a chip (SoCs) baseados em FPGAs, juntamente com a evolução das ferramentas, tem deixado um espaço entre o lançamento e a produção de materiais didáticos que auxiliem os engenheiros no Co- Projecto de hardware/software a partir dessas tecnologias. Com o intuito de auxiliar na redução desse intervalo temporal, o presente trabalho apresenta o desenvolvimento de documentos (tutoriais) direcionados a duas tecnologias recentes: a ferramenta de desenvolvimento de hardware/software VIVADO; e o SoC Zynq-7000, Z-7010, ambos desenvolvidos pela Xilinx. Os documentos produzidos são baseados num projeto básico totalmente implementado em lógica programável e do mesmo projeto implementado através do processador programável embarcado, para que seja possível avaliar o fluxo de projeto da ferramenta para um projeto totalmente implementado em hardware e o fluxo de projeto para o mesmo projeto implementado numa estrutura de harware/software.

eVentos 2 - Autonomous sailboat control

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

Emulador de un microcontrolador PIC 16F84 basado en una FPGA

L'objectiu d'aquest projecte és investigar la viabilitat de realització d'emuladors de microcontroladors basats en circuïts electrònics de lògica programable mitjançant un avantprojecte que analitzi les tècniques i eines necessàries.

Operatiivisten järjestelmien integrointi toimintojen ohjaukseen vaneritehtaassa

Työn tavoite oli löytää malli, joka mahdollistaisi kaikkien tilaus- toimitusprosessin operatiivisten järjestelmien integroimisen keskenään siten, että niitä voidaan hyödyntää valmistuksen ohjaukseen. Vaneritehtaissa ei ole keskitettyä tietojärjestelmää, joten tavoiteasetanta edellytti vaneritehtaan tietoverkon rakentamiseen liittyvän ongelmakentän periaatteellista ratkaisua.Koska tilaus- toimitusprosessi, tuotantoa lukuunottamatta, oli kohdeyrityksessä katettu tietojärjestelmillä, loivat nämä jo olemassa olevat järjestelmät reunaehdot ratkaisulle myös tuotannon tietoverkon kehittämisessä. Työssä etsittiin ja kiinnitettiin avaimet, joilla tuote- sekä henkilötieto saadaan identifioitua keskenään integroiduissa järjestelmissä niin, että informaatioketju ei katkea siirryttäessä järjestelmästä toiseen.Työssä ratkaistiin tietoverkon liityntä tuotantolaitteisiin valvomotuotteen avulla. Liittymisratkaisuja esiteltiin neljä. Nämä mallit kattavat suurimman osan vaneritehtaassa eteen tulevista tapauksista. Näiden lisäksi päädyttiin suosittamaan erään mekaanisen metsäteollisuuden laitetoimittajan luomaa tiedonkeruu- ja tuotannonsuunnitteluohjelmistoa, joka valmiina ratkaisuna edesauttaa tietoverkon nopeaa implementointia.

Kahden portaalirobotin liikkeen synkronisointijärjestelmän toteuttaminen, käyttöönotto ja testaus, järjestelmän toteuttaminen, käyttöönotto ja testaus.

Tuotekehitysprojektin tarkoitus oli kehittää "älykäs" automaatiojärjestelmä kahdesta portaalirobotista muodostuvaan kuljetinlinjaan, jossa molemmat robotit synkronoidaan kulkemaan yhtäaikaisesti sähköisen akselin avulla. Tämän teknisen ratkaisun avulla kiinteitä kustannuksia, kuten valmistus- ja asennuskustannukset, saadaan laskemaan. Kuljetinlinjaa ohjataan hajautetun automaatiojärjestelmän avulla, jossa vastaanotettu ja lähetetty tieto kulkee MPI- ja Profibus-väylien kautta. Ohjelmoitava logiikkaohjain hoitaa tiedonsiirron ylätason PC:n ja hajautettujen solmujen välillä sekä jakaa tehtäviä alatason periferialaitteille. Robottien välinen sähköinen akseli mahdollistaa terästukirakenteiden ja kehikkojen jäämisen pois, jotka vain vievät tilaa tuotantotiloilta, laitteistoilta ja koneilta. Tukirakenteiden asennustyöt ovat myös aikaa vieviä ja kalliita. Huolimatta lisääntyneestä elektronisten komponenttien lukumäärästä tulee uusi tekninen ratkaisu kustannuksiltaan halvemmaksi kuin aikaisemmin käytetty mekaanisesti yhdistetty kuljetin.

Reaaliaikaisen tiedonsiirtolinkin muodostaminen prosessisäädön simulointi- ja valvomo-ohjelmiston välille

Teollisuusautomaatiossa käytetään varta vasten automaatiosovelluksiin tarkoitettuja tietokoneita eli ohjelmoitavia logiikoita (PLC, Programmable Logic Control). Ohjelmoitavan logiikan ja käyttäjän välillä on hyvin useasti jonkin asteinen käyttöliittymä (HMI, Human-Machine Interface). Käyttöliittymä voidaan toteuttaa logiikkaan liitettävien näyttöpäätteiden tai PC-pohjaisten valvomo-ohjelmien avulla. Käyttöliittymän kautta käyttäjä voi valvoa ja ohjata automaatiojärjestelmää. Tämän kandidaatintyön aiheena on reaaliajassa toimivan tiedonsiirtolinkin luominen prosessisäädön simulointiohjelmiston ja valvomo-ohjelmiston välille. Prosessiasäätöä simuloidaan MATLAB:in Simulink-ohjelmistolla ja käyttöliittymä luodaan InTouch valvomo-ohjelmistolla. Simuloitavana prosessina toimii nelitankkiprosessi, jossa kahden tankin pinnankorkeutta säädetään kahdella pumpulla. Prosessista tekee erittäin mielenkiintoisen se, että prosessilla on kolmitieventtiilien asennoista riippuen kaksi eri toimintapistettä: minimivaiheinen ja ei-minimivaiheinen. Myös tankkien ristiinkytköksien johdosta prosessi on normaalia tankkiprosessia mielenkiintoisempi. Tiedonsiirtolinkin muodostaminen prosessisäädön simuloinnin sekä valvomo-ohjelmiston välille mahdollistaa lukuisia erilaisia käyttötarkoituksia. Varsinkin opetuskäytössä tämä on erittäin käyttökelpoinen, koska se ei vaadi todellisen prosessin eikä laitteistojen läsnäoloa. Sen avulla voidaan opettaa valvomo-ohjelmien luomista sekä niiden käyttöä. Myös prosessisäätöä voidaan opettaa erittäin havainnollisesti.

Underwater Remote Welding Technology for Offshore Structures

The construction of offshore structures, equipment and devices requires a high level of mechanical reliability in terms of strength, toughness and ductility. One major site for mechanical failure, the weld joint region, needs particularly careful examination, and weld joint quality has become a major focus of research in recent times. Underwater welding carried out offshore faces specific challenges affecting the mechanical reliability of constructions completed underwater. The focus of this thesis is on improvement of weld quality of underwater welding using control theory. This research work identifies ways of optimizing the welding process parameters of flux cored arc welding (FCAW) during underwater welding so as to achieve desired weld bead geometry when welding in a water environment. The weld bead geometry has no known linear relationship with the welding process parameters, which makes it difficult to determine a satisfactory weld quality. However, good weld bead geometry is achievable by controlling the welding process parameters. The doctoral dissertation comprises two sections. The first part introduces the topic of the research, discusses the mechanisms of underwater welding and examines the effect of the water environment on the weld quality of wet welding. The second part comprises four research papers examining different aspects of underwater wet welding and its control and optimization. Issues considered include the effects of welding process parameters on weld bead geometry, optimization of FCAW process parameters, and design of a control system for the purpose of achieving a desired bead geometry that can ensure a high level of mechanical reliability in welded joints of offshore structures. Artificial neural network systems and a fuzzy logic controller, which are incorporated in the control system design, and a hybrid of fuzzy and PID controllers are the major control dynamics used. This study contributes to knowledge of possible solutions for achieving similar high weld quality in underwater wet welding as found with welding in air. The study shows that carefully selected steels with very low carbon equivalent and proper control of the welding process parameters are essential in achieving good weld quality. The study provides a platform for further research in underwater welding. It promotes increased awareness of the need to improve the quality of underwater welding for offshore industries and thus minimize the risk of structural defects resulting from poor weld quality.

Verification and FPGA circuits of a block-2 fast path-based predictor

This paper formally derives a new path-based neural branch prediction algorithm (FPP) into blocks of size two for a lower hardware solution while maintaining similar input-output characteristic to the algorithm. The blocked solution, here referred to as B2P algorithm, is obtained using graph theory and retiming methods. Verification approaches were exercised to show that prediction performances obtained from the FPP and B2P algorithms differ within one mis-prediction per thousand instructions using a known framework for branch prediction evaluation. For a chosen FPGA device, circuits generated from the B2P algorithm showed average area savings of over 25% against circuits for the FPP algorithm with similar time performances thus making the proposed blocked predictor superior from a practical viewpoint.

Experiences applying OVM 2.0 to an 8B/10B RTL design

The SystemVerilog implementation of the Open Verification Methodology (OVM) is exercised on an 8b/10b RTL open core design in the hope of being a simple yet complete exercise to expose the key features of OVM. Emphasis is put onto the actual usage of the verification components rather than a complete verification flow aiming at being of help to readers unfamiliar with OVM seeking to apply the methodology to their own designs. A link that takes you to the complete code is given to reinforce this aim. We found the methodology easy to use but intimidating at first glance specially for someone with little experience in object oriented programming. However it is clear to see the flexibility, portability and reusability of verification code once you manage to give some first steps.

A clocking technique with power savings in virtex-based pipelined designs

This paper presents the evaluation in power consumption of a clocking technique for pipelined designs. The technique shows a dynamic power consumption saving of around 30% over a conventional global clocking mechanism. The results were obtained from a series of experiments of a systolic circuit implemented in Virtex-II devices. The conversion from a global-clocked pipelined design to the proposed technique is straightforward, preserving the original datapath design. The savings can be used immediately either as a power reduction benefit or to increase the frequency of operation of a design for the same power consumption.

TCL/TK for EDA tools

Tcl/Tk scripting language has become the de-facto standard for EDA tools. This paper explains how to start working with Tcl/Tk using simple examples. Two complete applications are presented to show in more detail the capabilities of the language. In one script average power consumption of a digital system is automated. A second script creates a virtual display driven by the simulation of a graphic card.