A Reduced Device-Count Hybrid Multilevel Inverter Topology with single DC Source and Improved Fault Tolerance

A new hybrid multilevel power converter topology is presented in this paper. The proposed power converter topology uses only one DC source and floating capacitors charged to asymmetrical voltage levels, are used for generating different voltage levels. The SVPWM based control strategy used in this converter maintains the capacitor voltages at the required levels in the entire modulation range including the over-modulation region. For the voltage levels: nine and above, the number of components required in the proposed topology is significantly lower, compared to the conventional multilevel inverter topologies. The number of capacitors required in this topology reduces drastically compared to the conventional flying capacitor topology, when the number of levels in the inverter output increases. This topology has better fault tolerance, as it is capable of operating with reduced number of levels, in the entire modulation range, in the event of any failure in the H-bridges. The transient as well as the steady state performance of the nine-level version of the proposed topology is experimentally verified in the entire modulation range including the over-modulation region.

Exact Solution of the PPP Model for Correlated Electronic States of Tetracene and Substituted Tetracene

Tetracene is an important conjugated molecule for device applications. We have used the diagrammatic valence bond method to obtain the desired states, in a Hilbert space of about 450 million singlets and 902 million triplets. We have also studied the donor/acceptor (D/A)-substituted tetracenes with D and A groups placed symmetrically about the long axis of the molecule. In these cases, by exploiting a new symmetry, which is a combination of C-2 symmetry and electron-hole symmetry, we are able to obtain their low-lying states. In the case of substituted tetracene, we find that optically allowed one-photon excitation gaps reduce with increasing D/A strength, while the lowest singlet triplet gap is only wealdy affected. In all the systems we have studied, the excited singlet state, S-i, is at more than twice the energy of the lowest triplet state and the second triplet is very close to the S-1 state. Thus, donor-acceptor-substituted tetracene could be a good candidate in photovoltaic device application as it satisfies energy criteria for singlet fission. We have also obtained the model exact second harmonic generation (SHG) coefficients using the correction vector method, and we find that the SHG responses increase with the increase in D/A strength.

Quantitative Strain and Compositional Studies of InxGa1-xAs Epilayer in a GaAs-based pHEMT Device Structure by TEM Techniques

In GaAs-based pseudomorphic high-electron mobility transistor device structures, strain and composition of the InxGa1 (-) As-x channel layer are very important as they influence the electronic properties of these devices. In this context, transmission electron microscopy techniques such as (002) dark-field imaging, high-resolution transmission electron microscopy (HRTEM) imaging, scanning transmission electron microscopy-high angle annular dark field (STEM-HAADF) imaging and selected area diffraction, are useful. A quantitative comparative study using these techniques is relevant for assessing the merits and limitations of the respective techniques. In this article, we have investigated strain and composition of the InxGa1 (-) As-x layer with the mentioned techniques and compared the results. The HRTEM images were investigated with strain state analysis. The indium content in this layer was quantified by HAADF imaging and correlated with STEM simulations. The studies showed that the InxGa1 (-) As-x channel layer was pseudomorphically grown leading to tetragonal strain along the 001] growth direction and that the average indium content (x) in the epilayer is similar to 0.12. We found consistency in the results obtained using various methods of analysis.

On the Origin of Steep I-V Nonlinearity in Mixed-Ionic-Electronic-Conduction-Based Access Devices

Numerical modeling is used to explain the origin of the large ON/OFF ratios, ultralow leakage, and high ON-current densities exhibited by back-end-of-the-line-friendly access devices based on copper-containing mixed-ionic-electronic-conduction (MIEC) materials. Hall effect measurements confirm that the electronic current is hole dominated; a commercial semiconductor modeling tool is adapted to model MIEC. Motion of large populations of copper ions and vacancies leads to exponential increases in hole current, with a turn-ON voltage that depends on material bandgap. Device simulations match experimental observations as a function of temperature, electrode aspect ratio, thickness, and device diameter.

Part I: High-Voltage MOS Device Design for Improved Static and RF Performance

In this paper, for the first time, the key design parameters of a shallow trench isolation-based drain-extended MOS transistor are discussed for RF power applications in advanced CMOS technologies. The tradeoff between various dc and RF figures of merit (FoMs) is carefully studied using well-calibrated TCAD simulations. This detailed physical insight is used to optimize the dc and RF behavior, and our work also provides a design window for the improvement of dc as well as RF FoMs, without affecting the breakdown voltage. An improvement of 50% in R-ON and 45% in RF gain is achieved at 1 GHz. Large-signal time-domain analysis is done to explore the output power capability of the device.

Part II: A Fully Integrated RF PA in 28-nm CMOS With Device Design for Optimized Performance and ESD Robustness

In this paper, we report drain-extended MOS device design guidelines for the RF power amplifier (RF PA) applications. A complete RF PA circuit in a 28-nm CMOS technology node with the matching and biasing network is used as a test vehicle to validate the RF performance improvement by a systematic device design. A complete RF PA with 0.16-W/mm power density is reported experimentally. By simultaneous improvement of device-circuit performance, 45% improvement in the circuit RF power gain, 25% improvement in the power-added efficiency at 1-GHz frequency, and 5x improvement in the electrostatic discharge robustness are reported experimentally.

Part I: Physical Insights Into the Two-Stage Breakdown Characteristics of STI-Type Drain-Extended pMOS Device

In this paper, we study breakdown characteristics in shallow-trench isolation (STI)-type drain-extended MOSFETs (DeMOS) fabricated using a low-power 65-nm triple-well CMOS process with a thin gate oxide. Experimental data of p-type STI-DeMOS device showed distinct two-stage behavior in breakdown characteristics in both OFF-and ON-states, unlike the n-type device, causing a reduction in the breakdown voltage and safe operating area. The first-stage breakdown occurs due to punchthrough in the vertical structure formed by p-well, deep n-well, and p-substrate, whereas the second-stage breakdown occurs due to avalanche breakdown of lateral n-well/p-well junction. The breakdown characteristics are also compared with the STI-DeNMOS device structure. Using the experimental results and advanced TCAD simulations, a complete understanding of breakdown mechanisms is provided in this paper for STI-DeMOS devices in advanced CMOS processes.

Part II: Design of Well Doping Profile for Improved Breakdown and Mixed-Signal Performance of STI-Type DePMOS Device

Shallow-trench isolation drain extended pMOS (STI-DePMOS) devices show a distinct two-stage breakdown. The impact of p-well and deep-n-well doping profile on breakdown characteristics is investigated based on TCAD simulations. Design guidelines for p-well and deep-n-well doping profile are developed to shift the onset of the first-stage breakdown to a higher drain voltage and to avoid vertical punch-through leading to early breakdown. An optimal ratio between the OFF-state breakdown voltage and the ON-state resistance could be obtained. Furthermore, the impact of p-well/deep-n-well doping profile on the figure of merits of analog and digital performance is studied. This paper aids in the design of STI drain extended MOSFET devices for widest safe operating area and optimal mixed-signal performance in advanced system-on-chip input-output process technologies.

Synthesis, and crystal and electronic structure of sodium metal phosphate for use as a hybrid capacitor in non-aqueous electrolyte

Energy storage devices based on sodium have been considered as an alternative to traditional lithium based systems because of the natural abundance, cost effectiveness and low environmental impact of sodium. Their synthesis, and crystal and electronic properties have been discussed, because of the importance of electronic conductivity in supercapacitors for high rate applications. The density of states of a mixed sodium transition metal phosphate (maricite, NaMn1/3Co1/3Ni1/3PO4) has been determined with the ab initio generalized gradient approximation (GGA)+Hubbard term (U) method. The computed results for the mixed maricite are compared with the band gap of the parent NaFePO4 and the electrochemical experimental results are in good agreement. A mixed sodium transition metal phosphate served as an active electrode material for a hybrid supercapacitor. The hybrid device (maricite versus carbon) in a nonaqueous electrolyte shows redox peaks in the cyclic voltammograms and asymmetric profiles in the charge-discharge curves while exhibiting a specific capacitance of 40 F g(-1) and these processes are found to be quasi-reversible. After long term cycling, the device exhibits excellent capacity retention (95%) and coulombic efficiency (92%). The presence of carbon and the nanocomposite morphology, identified through X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) studies, ensures the high rate capability while offering possibilities to develop new cathode materials for sodium hybrid devices.

Efficient Gate-tunable light-emitting device made of defective boron nitride nanotubes: from ultraviolet to the visible

Boron nitride is a promising material for nanotechnology applications due to its two-dimensional graphene-like, insulating, and highly-resistant structure. Recently it has received a lot of attention as a substrate to grow and isolate graphene as well as for its intrinsic UV lasing response. Similar to carbon, one-dimensional boron nitride nanotubes (BNNTs) have been theoretically predicted and later synthesised. Here we use first principles simulations to unambiguously demonstrate that i) BN nanotubes inherit the highly efficient UV luminescence of hexagonal BN; ii) the application of an external perpendicular field closes the electronic gap keeping the UV lasing with lower yield; iii) defects in BNNTS are responsible for tunable light emission from the UV to the visible controlled by a transverse electric field (TEF). Our present findings pave the road towards optoelectronic applications of BN-nanotube-based devices that are simple to implement because they do not require any special doping or complex growth

Electrochemical fabrication and electronic behavior of polypyrrole nano-fiber array devices

Electrochemically active Polypyrrole (PPy) nano-fiber array device was fabricated via electrochemical deposition method using aluminum anodic oxide (AAO) membrane as template. After alkaline treatment electrochemically active PPy nano-fiber lost electrochemical activity, and became electrochemically inactive PPy. The electronic properties of PPy nano-fiber array devices were measured by means of a simple method. It was found that for an indium-tin oxide/electrochemically inactive PPy nano-fiber device, the conductivity of nano-fiber increased with the increase of voltage applied on the two terminals of nano-fiber. The electrochemical inactive PPy nano-fiber might be used as a nano-fiber switching diode. Both Au/electrochemically active PPy and Au/electrochemically inactive PPy nano-fiber devices demonstrate rectifying behavior, and might have been used for further application as nano-rectifiers. (c) 2005 Elsevier B.V. All tights reserved.

Tuning of the electronic characteristics of ZnO nanowire field effect transistors by proton irradiation.

We demonstrated a controllable tuning of the electronic characteristics of ZnO nanowire field effect transistors (FETs) using a high-energy proton beam. After a short proton irradiation time, the threshold voltage shifted to the negative gate bias direction with an increase in the electrical conductance, whereas the threshold voltage shifted to the positive gate bias direction with a decrease in the electrical conductance after a long proton irradiation time. The electrical characteristics of two different types of ZnO nanowires FET device structures in which the ZnO nanowires are placed on the substrate or suspended above the substrate and photoluminescence (PL) studies of the ZnO nanowires provide substantial evidence that the experimental observations result from the irradiation-induced charges in the bulk SiO(2) and at the SiO(2)/ZnO nanowire interface, which can be explained by a surface-band-bending model in terms of gate electric field modulation. Our study on the proton-irradiation-mediated functionalization can be potentially interesting not only for understanding the proton irradiation effects on nanoscale devices, but also for creating the property-tailored nanoscale devices.

Tunable electronic transport characteristics of surface-architecture-controlled ZnO nanowire field effect transistors.

Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on various ZnO buffer film coated c-plane sapphire substrates with or without Au catalysts. The ZnO nanowires that were grown showed two different types of geometric properties: corrugated ZnO nanowires having a relatively smaller diameter and a strong deep-level emission photoluminescence (PL) peak and smooth ZnO nanowires having a relatively larger diameter and a weak deep-level emission PL peak. The surface morphology and size-dependent tunable electronic transport properties of the ZnO nanowires were characterized using a nanowire field effect transistor (FET) device structure. The FETs made from smooth ZnO nanowires with a larger diameter exhibited negative threshold voltages, indicating n-channel depletion-mode behavior, whereas those made from corrugated ZnO nanowires with a smaller diameter had positive threshold voltages, indicating n-channel enhancement-mode behavior.

Towards a fast electro-thermo-mechanical IGBT/Diode simulation framework for design of reliable power electronic converters

This paper describes a methodology that enables fast and reasonably accurate prediction of the reliability of power electronic modules featuring IGBTs and p-i-n diodes, by taking into account thermo-mechanical failure mechanisms of the devices and their associated packaging. In brief, the proposed simulation framework performs two main tasks which are tightly linked together: (i) the generation of the power devices' transient thermal response for realistic long load cycles and (ii) the prediction of the power modules' lifetime based on the obtained temperature profiles. In doing so the first task employs compact, physics-based device models, power losses lookup tables and polynomials and combined material-failure and thermal modelling, while the second task uses advanced reliability tests for failure mode and time-to-failure estimation. The proposed technique is intended to be utilised as a design/optimisation tool for reliable power electronic converters, since it allows easy and fast investigation of the effects that changes in circuit topology or devices' characteristics and packaging have on the reliability of the employed power electronic modules. © 2012 IEEE.

Electronic properties of GaAs, InAs and InP nanowires studied by terahertz spectroscopy.

We have performed a comparative study of ultrafast charge carrier dynamics in a range of III-V nanowires using optical pump-terahertz probe spectroscopy. This versatile technique allows measurement of important parameters for device applications, including carrier lifetimes, surface recombination velocities, carrier mobilities and donor doping levels. GaAs, InAs and InP nanowires of varying diameters were measured. For all samples, the electronic response was dominated by a pronounced surface plasmon mode. Of the three nanowire materials, InAs nanowires exhibited the highest electron mobilities of 6000 cm² V⁻¹ s⁻¹, which highlights their potential for high mobility applications, such as field effect transistors. InP nanowires exhibited the longest carrier lifetimes and the lowest surface recombination velocity of 170 cm s⁻¹. This very low surface recombination velocity makes InP nanowires suitable for applications where carrier lifetime is crucial, such as in photovoltaics. In contrast, the carrier lifetimes in GaAs nanowires were extremely short, of the order of picoseconds, due to the high surface recombination velocity, which was measured as 5.4 × 10⁵ cm s⁻¹. These findings will assist in the choice of nanowires for different applications, and identify the challenges in producing nanowires suitable for future electronic and optoelectronic devices.