A multi-cell variable frequency interleaved ZCS boost rectifier digitally controlled by FPGA

This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by Field Programmable Gate Array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-vohage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a preregulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

An approach of optimal sensitivity applied in the tertiary loop of the automatic generation control

This paper proposes an approach of optimal sensitivity applied in the tertiary loop of the automatic generation control. The approach is based on the theorem of non-linear perturbation. From an optimal operation point obtained by an optimal power flow a new optimal operation point is directly determined after a perturbation, i.e., without the necessity of an iterative process. This new optimal operation point satisfies the constraints of the problem for small perturbation in the loads. The participation factors and the voltage set point of the automatic voltage regulators (AVR) of the generators are determined by the technique of optimal sensitivity, considering the effects of the active power losses minimization and the network constraints. The participation factors and voltage set point of the generators are supplied directly to a computational program of dynamic simulation of the automatic generation control, named by power sensitivity mode. Test results are presented to show the good performance of this approach. (C) 2008 Elsevier B.V. All rights reserved.

Violet-blue emissions due to frequency up-conversion in Nd3+-doped fluoroindate glasses

We report the observation of intense frequency up-conversion in Nd3+-doped fluoroindate glasses pumped by the second harmonic of a cw mode-locked Nd: YAG laser. Mechanisms for generating the observed emissions are discussed.

Power flow optimization for grid connected inverter using evolutionary algorithm and additional control loop

In this work it is proposed to validate an evolutionary tuning algorithm in plants composed by a grid connected inverter. The optimization aims the tuning of the slopes of P-Ω and Q-V curves so that the system is stable, damped and minimum settling time. Simulation and experimental results are presented to prove the feasibility of the proposed approach. However, experimental results demonstrate a compromising effect of grid frequency oscillations in the active power transferring. In addition, it was proposed an additional loop to compensate this effect ensuring a constant active power flow. © 2011 IEEE.

Desenvolvimento de um sintetizador de freqüência de baixo custo em tecnologia CMOS

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Laser locking to the Hg-199 S-1(0)-P-3(0) clock transition with 5.4x10(-15)/root tau fractional frequency instability

With Hg-199 atoms confined in an optical lattice trap in the Lamb-Dicke regime, we obtain a spectral line at 265.6 nm for which the FWHM is similar to 15 Hz. Here we lock an ultrastable laser to this ultranarrow S-1(0) - P-3(0) clock transition and achieve a fractional frequency instability of 5.4 x 10(-15) / root tau for tau <= 400 s. The highly stable laser light used for the atom probing is derived from a 1062.6 nm fiber laser locked to an ultrastable optical cavity that exhibits a mean drift rate of -6.0 x 10(-17) s-(1) (-16.9 mHzs(-1) at 282 THz) over a six month period. A comparison between two such lasers locked to independent optical cavities shows a flicker noise limited fractional frequency instability of 4 x 10(-16) per cavity. (c) 2012 Optical Society of America

PD controller synthesis from open-loop response measurements of rotating system

In this work, a method of computing PD stabilising gains for rotating systems is presented based on the D-decomposition technique, which requires the sole knowledge of frequency response functions. By applying this method to a rotating system with electromagnetic actuators, it is demonstrated that the stability boundary locus in the plane of feedback gains can be easily plotted, and the most suitable gains can be found to minimise the resonant peak of the system. Experimental results for a Laval rotor show the feasibility of not only controlling lateral shaft vibration and assuring stability, but also helps in predicting the final vibration level achieved by the closed-loop system. These results are obtained based solely on the input-output response information of the system as a whole.

Enabling Blocks for Integrated CMOS UWB Transceivers

The last decades have seen an unrivaled growth and diffusion of mobile telecommunications. Several standards have been developed to this purposes, from GSM mobile phone communications to WLAN IEEE 802.11, providing different services for the the transmission of signals ranging from voice to high data rate digital communications and Digital Video Broadcasting (DVB). In this wide research and market field, this thesis focuses on Ultra Wideband (UWB) communications, an emerging technology for providing very high data rate transmissions over very short distances. In particular the presented research deals with the circuit design of enabling blocks for MB-OFDM UWB CMOS single-chip transceivers, namely the frequency synthesizer and the transmission mixer and power amplifier. First we discuss three different models for the simulation of chargepump phase-locked loops, namely the continuous time s-domain and discrete time z-domain approximations and the exact semi-analytical time-domain model. The limitations of the two approximated models are analyzed in terms of error in the computed settling time as a function of loop parameters, deriving practical conditions under which the different models are reliable for fast settling PLLs up to fourth order. Besides, a phase noise analysis method based upon the time-domain model is introduced and compared to the results obtained by means of the s-domain model. We compare the three models over the simulation of a fast switching PLL to be integrated in a frequency synthesizer for WiMedia MB-OFDM UWB systems. In the second part, the theoretical analysis is applied to the design of a 60mW 3.4 to 9.2GHz 12 Bands frequency synthesizer for MB-OFDM UWB based on two wide-band PLLs. The design is presented and discussed up to layout level. A test chip has been implemented in TSMC CMOS 90nm technology, measured data is provided. The functionality of the circuit is proved and specifications are met with state-of-the-art area occupation and power consumption. The last part of the thesis deals with the design of a transmission mixer and a power amplifier for MB-OFDM UWB band group 1. The design has been carried on up to layout level in ST Microlectronics 65nm CMOS technology. Main characteristics of the systems are the wideband behavior (1.6 GHz of bandwidth) and the constant behavior over process parameters, temperature and supply voltage thanks to the design of dedicated adaptive biasing circuits.

Neurokinin-2 receptor levels correlate with intensity, frequency, and duration of pain in chronic pancreatitis

OBJECTIVE: Generation and maintenance of pain in chronic pancreatitis (CP) have been shown to be partially attributable to neuroimmune interactions, which involve neuropeptides such as substance P (SP). So far, expression of SP receptors NK-2R, NK-3R, the SP-encoding gene preprotachykinin A (PPT-A), and the SP degradation enzyme neutral endopeptidase (NEP) and their relation to pain in CP have not been determined. METHODS: Tissue samples from patients with CP (n = 25) and from healthy donors (n = 20) were analyzed for PPT-A, NK-2R, NK-3R, and NEP expression using quantitative RT-PCR. NEP protein levels were examined by immunoblot analysis and its localization was determined using immunohistochemistry. A scoring system was used to grade the extent of fibrosis on hematoxylin and eosin- and Masson-Trichrome-stained sections. Messenger RNA levels and the extent of pain were analyzed for correlations. RESULTS: In CP tissues, NK-2R and PPT-A expression was increased, whereas NK-3R and NEP mRNA levels were comparable with normal pancreas. Overexpression of NK-2R was related to the intensity, frequency, and duration of pain in CP patients. NK-1R and NEP expression was significantly related to the extent of fibrosis. CONCLUSIONS: Expression of NK-2R and PPT-A is increased in CP and is associated with pain. Failure to up-regulate NEP may contribute to the disruption of the neuropeptides loop balance in CP and thus may exacerbate the severe pain syndrome.

Comments and remarks over classic linear loop-gain method for oscillator design and analysis. New proposed method based on NDF/RRT

Abstract. This paper describes a new and original method for designing oscillators based on the Normalized Determinant Function (NDF) and Return Relations (RRT)- Firstly, a review of the loop-gain method will be performed. The loop-gain method pros, cons and some examples for exploring wrong solutions provided by this method will be shown. This method produces in some cases wrong solutions because some necessary conditions have not been fulfilled. The required necessary conditions to assure a right solution will be described. The necessity of using the NDF or the Transpose Return Relations (RRT), which are related with the True Loop-Gain, to test the additional conditions will be demonstrated. To conclude this paper, the steps for oscillator design and analysis, using the proposed NDF/RRj method, will be presented. The loop-gain wrong solutions will be compared with the NDF/RRj and the accuracy of this method to estimate the oscillation frequency and QL will be demonstrated. Some additional examples of plane reference oscillators (Z/Y/T), will be added and they will be analyzed with the new NDF/RRj proposed method, even these oscillators cannot be analyzed using the classic loop gain method.

Functional validation of MB-OFDM system using HW-in the loop

Functional validation of complex digital systems is a hard and critical task in the design flow. In particular, when dealing with communication systems, like Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband (MB-OFDM UWB), the design decisions taken during the process have to be validated at different levels in an easy way. In this work, a unified algorithm-architecture-circuit co-design environment for this type of systems, to be implemented in FPGA, is presented. The main objective is to find an efficient methodology for designing a configurable optimized MB-OFDM UWB system by using as few efforts as possible in verification stage, so as to speed up the development period. Although this efficient design methodology is tested and considered to be suitable for almost all types of complex FPGA designs, we propose a solution where both the circuit and the communication channel are tested at different levels (algorithmic, RTL, hardware device) using a common testbench.

Comparison of V2IC control with voltage mode and current mode controls for high frequency (MHz) and very fast response applications

High switching frequencies (several MHz) allow the integration of low power DC/DC converters. Although, in theory, a high switching frequency would make possible to implement a conventional Voltage Mode control (VMC) or Peak Current Mode control (PCMC) with very high bandwidth, in practice, parasitic effects and robustness limits the applicability of these control techniques. This paper compares VMC and CMC techniques with the V2IC control. This control is based on two loops. The fast internal loop has information of the output capacitor current and the error voltage, providing fast dynamic response under load and voltage reference steps, while the slow external voltage loop provides accurate steady state regulation. This paper shows the fast dynamic response of the V2IC control under load and output voltage reference steps and its robustness operating with additional output capacitors added by the customer.

A hardware in the loop design methodology for FPGA system and its application to complex functions

In this work, a unified algorithm-architecture-circuit co-design environment for complex FPGA system development is presented. The main objective is to find an efficient methodology for designing a configurable optimized FPGA system by using as few efforts as possible in verification stage, so as to speed up the development period. A proposed high performance FFT/iFFT processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband (MB-OFDM UWB) system design process is given as an example to demonstrate the proposed methodology. This efficient design methodology is tested and considered to be suitable for almost all types of complex FPGA system designs and verifications.

High-frequency signal generation using 1550 nm VCSEL subject to two-frequency optical injection

We experimentally investigate high-frequency microwave signal generation using a 1550 nm single-mode VCSEL subject to two-frequency optical injection. We first consider a situation in which the injected signals come from two similar VCSELs. The polarization of the injected light is parallel to that of the injected VCSEL. We obtain that the VCSEL can be locked to one of the injected signals, but the observed microwave signal is originated by beating at the photodetector. In a second situation we consider injected signals that come from two external cavity tunable lasers with a significant increase of the injected power with respect to the VCSEL-by-VCSEL injection case. The polarization of the injected light is orthogonal to that of the free-running slave VCSEL. We show that in this case it is possible to generate a microwave signal inside the VCSEL cavity. © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

Dual Active Bridge based Battery Charger for Plug-in Hybrid Electric Vehicle with Charging Current Containing Low Frequency Ripple

High power density is strongly preferable for the on-board battery charger of Plug-in Hybrid Electric Vehicle (PHEV). Wide band gap devices, such as Gallium Nitride HEMTs are being explored to push to higher switching frequency and reduce passive component size. In this case, the bulk DC link capacitor of AC-DC Power Factor Correction (PFC) stage, which is usually necessary to store ripple power of two times the line frequency in a DC current charging system, becomes a major barrier on power density. If low frequency ripple is allowed in the battery, the DC link capacitance can be significantly reduced. This paper focuses on the operation of a battery charging system, which is comprised of one Full Bridge (FB) AC-DC stage and one Dual Active Bridge (DAB) DC-DC stage, with charging current containing low frequency ripple at two times line frequency, designated as sinusoidal charging. DAB operation under sinusoidal charging is investigated. Two types of control schemes are proposed and implemented in an experimental prototype. It is proved that closed loop current control is the better. Full system test including both FB AC-DC stage and DAB DC-DC stage verified the concept of sinusoidal charging, which may lead to potentially very high power density battery charger for PHEV.