QRD and SVD processor design based on an approximate rotations algorithm

A silicon implementation of the Approximate Rotations algorithm capable of carrying the computational load of algorithms such as QRD and SVD, within the real-time realisation of applications such as Adaptive Beamforming, is described. A modification to the original Approximate Rotations algorithm to simplify the method of optimal angle selection is proposed. Analysis shows that fewer iterations of the Approximate Rotations algorithm are required compared with the conventional CORDIC algorithm to achieve similar degrees of accuracy. The silicon design studies undertaken provide direct practical evidence of superior performance with the Approximate Rotations algorithm, requiring approximately 40% of the total computation time of the conventional CORDIC algorithm, for a similar silicon area cost. © 2004 IEEE.

‘Emergent reconstruction’ in grounded theory: learning from team-based interview research

Constructivist grounded theory (CGT) methods render an interpretive portrayal, a construction of reality, strengthened when the process of construction is acknowledged. An Irish team study uses CGT to explore intergenerational solidarity at individual, familial and societal levels, and their interface. The study data comprise interviews with 100 people from diverse socio-economic and
age groups. The article contributes insights on applying CGT in team-based interview research on a topic with such breadth of scope. This contrasts with the more usual focused inquiry with a defined population. Adapting the method’s guidelines to the specific inquiry involved challenges in: framing the topic conceptually; situating research participants in contrasting social contexts to
provide interpretive depth; and generating interview data with which to construct theory. We argue that interrogating the very premise of the inquiry allowed for emergent reconstruction, a goal at the heart of the method.

Logic and Memory Design Based on Unequal Error Protection for Voltage-scalable, Robust and Adaptive DSP Systems

In this paper, we propose a system level design approach considering voltage over-scaling (VOS) that achieves error resiliency using unequal error protection of different computation elements, while incurring minor quality degradation. Depending on user specifications and severity of process variations/channel noise, the degree of VOS in each block of the system is adaptively tuned to ensure minimum system power while providing "just-the-right" amount of quality and robustness. This is achieved, by taking into consideration block level interactions and ensuring that under any change of operating conditions, only the "less-crucial" computations, that contribute less to block/system output quality, are affected. The proposed approach applies unequal error protection to various blocks of a system-logic and memory-and spans multiple layers of design hierarchy-algorithm, architecture and circuit. The design methodology when applied to a multimedia subsystem shows large power benefits ( up to 69% improvement in power consumption) at reasonable image quality while tolerating errors introduced due to VOS, process variations, and channel noise.