948 resultados para Electrical Power.


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The inaugural lecture of Professor Stephen Thomas at the University of Greenwich, 4th February 2010. It examines whether further pursuit of competition in energy markets and expansion in the role of nuclear power can be the main elements in a policy to meet goals of security, sustainability and affordability.

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This report examines the credibility of the claim by the UK government that nuclear power plants can be built in the UK without public subsidies and guarantees

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The design, construction and subsequent operation of the 75 kW oscillating water column wave power plant on the Isle of Islay has provided a significant insight into the practicality of wave power conversion. The development of wave power plant poses a significant design and construction challenge for not only civil but also mechanical and electrical engineers. The plant must withstand the immense forces imposed during storms, yet efficiently convert the slow cyclic motion of waves into a useful energy source such as electricity and do so at a price competitive with other forms of generation. In addition, the hostile marine environment hampers the construction process and the variability of the wave resource poses problems for electrical control and grid integration. Many sceptics consider wave power conversion to be too difficult, too expensive and too variable to justify the effort and expense necessary to develop this technology. However, the authors contend that with modular wave power systems developed from the practical experience gained with the Islay plant, wave power is a viable technology with a considerable world market potential. However, this technology is still at the early stages of development and will require the construction of a number of different prototypes before there is extensive commercial exploitation.

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Wireless enabled portable devices must operate with the highest possible energy efficiency while still maintaining a minimum level and quality of service to meet the user's expectations. The authors analyse the performance of a new pointer-based medium access control protocol that was designed to significantly improve the energy efficiency of user terminals in wireless local area networks. The new protocol, pointer controlled slot allocation and resynchronisation protocol (PCSAR), is based on the existing IEEE 802.11 point coordination function (PCF) standard. PCSAR reduces energy consumption by removing the need for power saving stations to remain awake and listen to the channel. Using OPNET, simulations were performed under symmetric channel loading conditions to compare the performance of PCSAR with the infrastructure power saving mode of IEEE 802.11, PCF-PS. The simulation results demonstrate a significant improvement in energy efficiency without significant reduction in performance when using PCSAR. For a wireless network consisting of an access point and 8 stations in power saving mode, the energy saving was up to 31% while using PCSAR instead of PCF-PS, depending upon frame error rate and load. The results also show that PCSAR offers significantly reduced uplink access delay over PCF-PS while modestly improving uplink throughput.

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Wavelets introduce new classes of basis functions for time-frequency signal analysis and have properties particularly suited to the transient components and discontinuities evident in power system disturbances. Wavelet analysis involves representing signals in terms of simpler, fixed building blocks at different scales and positions. This paper examines the analysis and subsequent compression properties of the discrete wavelet and wavelet packet transforms and evaluates both transforms using an actual power system disturbance from a digital fault recorder. The paper presents comparative compression results using the wavelet and discrete cosine transforms and examines the application of wavelet compression in power monitoring to mitigate against data communications overheads.

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This paper presents the results of feasibility study of a novel concept of power system on-line collaborative voltage stability control. The proposal of the on-line collaboration between power system controllers is to enhance their overall performance and efficiency to cope with the increasing operational uncertainty of modern power systems. In the paper, the framework of proposed on-line collaborative voltage stability control is firstly presented, which is based on the deployment of multi-agent systems and real-time communication for on-line collaborative control. Then two of the most important issues in implementing the proposed on-line collaborative voltage stability control are addressed: (1) Error-tolerant communication protocol for fast information exchange among multiple intelligent agents; (2) Deployment of multi-agent systems by using graph theory to implement power system post-emergency control. In the paper, the proposed on-line collaborative voltage stability control is tested in the example 10-machine 39-node New England power system. Results of feasibility study from simulation are given considering the low-probability power system cascading faults.

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The performance of a new pointer-based medium-access control protocol that was designed to significantly improve the energy efficiency of user terminals in quality-of-service-enabled wireless local area networks was analysed. The new protocol, pointer-controlled slot allocation and resynchronisation protocol (PCSARe), is based on the hybrid coordination function-controlled channel access mode of the IEEE 802.11e standard. PCSARe reduces energy consumption by removing the need for power-saving stations to remain awake for channel listening. Discrete event network simulations were performed to compare the performance of PCSARe with the non-automatic power save delivery (APSD) and scheduled-APSD power-saving modes of IEEE 802.11e. The simulation results show a demonstrable improvement in energy efficiency without significant reduction in performance when using PCSARe. For a wireless network consisting of an access point and eight stations in power-saving mode, the energy saving was up to 39% when using PCSARe instead of IEEE 802.11e non-APSD. The results also show that PCSARe offers significantly reduced uplink access delay over IEEE 802.11e non-APSD, while modestly improving the uplink throughput. Furthermore, although both had the same energy consumption, PCSARe gave a 25% reduction in downlink access delay compared with IEEE 802.11e S-APSD.

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This paper presents a new method for complex power flow tracing that can be used for allocating the transmission loss to loads or generators. Two algorithms for upstream tracing (UST) and downstream tracing (DST) of the complex power are introduced. UST algorithm traces the complex power extracted by loads back to source nodes and assigns a fraction of the complex power flow through each line to each load. DST algorithm traces the output of the generators down to the sink nodes determining the contributions of each generator to the complex power flow and losses through each line. While doing so, active- and reactive-power flows as well as complex losses are considered simultaneously, not separately as most of the available methods do. Transmission losses are taken into consideration during power flow tracing. Unbundling line losses are carried out using an equation, which has a physical basis, and considers the coupling between active- and reactive-power flows as well as the cross effects of active and reactive powers on active and reactive losses. The tracing algorithms introduced can be considered direct to a good extent, as there is no need for exhaustive search to determine the flow paths as these are determined in a systematic way during the course of tracing. Results of application of the proposed method are also presented.

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This paper presents a new method for transmission loss allocation. The method is based on tracing the complex power flow through the network and determining the share of each load on the flow and losses through each line. Transmission losses are taken into consideration during power flow tracing. Unbundling line losses is carried out using an equation, which has a physical basis, and considers the coupling between active and reactive power flows as well as the cross effects of active and reactive power on active and reactive losses. A tracing algorithm which can be considered direct to a good extent, as there is no need for exhaustive search to determine the flow paths as these are determined in a systematic way during the course of tracing. Results of application of the proposed method are also presented.

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A new universal power quality manager is proposed. The proposal treats a number of power quality problems simultaneously. The universal manager comprises a combined series and shunt three-phase PWM controlled converters sharing a common DC link. A control scheme based on fuzzy logic is introduced and the general features of the design and operation processes are outlined. The performance of two configurations of the proposed power quality manager are compared in terms of a recently formulated unified power quality index. The validity and integrity of the proposed system is proved through computer simulated experiments

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Hardware implementations of arithmetic operators using signed digit arithmetic have lost some of their earlier popularity. However, SD is revisited and used to realise an efficient radix-16 generic multiplier, which has particular potential for low-power implementation. The SD multiplier algorithm reduces the number of partial products to as much as 1/4, and in initial tests reduces the estimated power consumption to only about 50% of that of the Booth multiplier. It is different from other previous high-radix methods in that it employs a novel method to generate its partial products with zero arithmetic logic.

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A novel power-efficient systolic array architecture is proposed for full search block matching (FSBM) motion estimation, where the partial distortion elimination algorithm is used to dynamically switch off the computation of eliminated partial candidate blocks. The RTL-level simulation shows that the proposed architecture can reduce the power consumption of the computation part of the algorithm to about 60% of that of the conventional 2D systolic arrays.