Amplitude banded RLS approach to time variant channel equalization

This paper proposes a non-linear adaptive algorithm, the amplitude banded RLS (ABRLS) algorithm, as an adaptation procedure for time variant channel equalizers. In the ABRLS algorithm, a coefficient matrix is updated based on the amplitude level of the received sequence. To enhance the capability of tracking for the ABRLS algorithm, a parallel adaptation scheme is utilized which involves the structures of decision feedback equalizer (DFE). Computer simulations demonstrate that the novel ABRLS based equalizer provides a significant improvement relative to the conventional RLS DFE on a rapidly time variant communication channel.

Optimum decision delay of the finite-length DFE

This letter investigates the optimum decision delay and tap-length of the finite-length decision feedback equalizer. First we show that, if the feedback filter (FBF) length N-b is equal to or larger than the channel memory upsilon and the decision delay Delta is smaller than the feedforward filter (FFF) length N-f, then only the first Delta + 1 elements of the FFF can be nonzero. Based on this result we prove that the maximum effective FBF length is equal to the channel memory upsilon, and if N-b greater than or equal to upsilon and N-f is long enough, the optimum decision delay that minimizes the MMSE is N-f - 1.

Spectrally efficient cooperative diversity protocol for uplink wireless transmission

A spectrally efficient cooperative protocol for uplink wireless transmission in a centralised communication system is proposed, where each of the N users play the relaying and source roles simultaneously by using superposition (SP) modulation. The probability density function of the mutual information between SP-modulated transmitted and received signals of the cooperative uplink channels is derived. Using the high-signal-to-noise ratio (SNR) approximation of this density function, the outage probability formula of the system as well as its easily computable tight upper and lower bounds are obtained and these formulas are evaluated numerically. Numerical results show that the proposed strategy can achieve around 3 dB performance gain over comparable schemes. Furthermore, the multiplexing and diversity tradeoff formula is derived to illustrate the optimal performance of the proposed protocol, which also confirms that the SP relaying transmission does not cause any loss of data rate. Moreover, performance characterisation in terms of ergodic and outage capacities are studied and numerical results show that the proposed scheme can achieve significantly larger outage capacity than direct transmission, which is similar to other cooperative schemes. The superiority of the proposed strategy is demonstrated by the fact that it can maintain almost the same ergodic capacity as the direct transmission, whereas the ergodic capacity of other cooperative schemes would be much worse.

A self-structured adaptive decision feedback equalizer

In a decision feedback equalizer (DFE), the structural parameters, including the decision delay, the feedforward filter (FFF), and feedback filter (FBF) lengths, must be carefully chosen, as they greatly influence the performance. Although the FBF length can be set as the channel memory, there is no closed-form expression for the FFF length and decision delay. In this letter, first we analytically show that the two-dimensional search for the optimum FFF length and decision delay can be simplified to a one-dimensional search and then describe a new adaptive DFE where the optimum structural parameters can he self-adapted.

Adaptive data echo cancellation using cost function adaptation

For a digital echo canceller it is desirable to reduce the adaptation time, during which the transmission of useful data is not possible. LMS is a non-optimal algorithm in this case as the signals involved are statistically non-Gaussian. Walach and Widrow (IEEE Trans. Inform. Theory 30 (2) (March 1984) 275-283) investigated the use of a power of 4, while other research established algorithms with arbitrary integer (Pei and Tseng, IEEE J. Selected Areas Commun. 12(9)(December 1994) 1540-1547) or non-quadratic power (Shah and Cowan, IEE.Proc.-Vis. Image Signal Process. 142 (3) (June 1995) 187-191). This paper suggests that continuous and automatic, adaptation of the error exponent gives a more satisfactory result. The family of cost function adaptation (CFA) stochastic gradient algorithm proposed allows an increase in convergence rate and, an improvement of residual error. As special case the staircase CFA algorithm is first presented, then the smooth CFA is developed. Details of implementations are also discussed. Results of simulation are provided to show the properties of the proposed family of algorithms. (C) 2000 Elsevier Science B.V. All rights reserved.

Millimeter-Wave Soldier-to-Soldier Communications for Covert Battlefield Operations

Mobile ad hoc networking of dismounted combat personnel is expected to play an important role in the future of network-centric operations. High-speed, short-range, soldier-to-soldier wireless communications will be required to relay information on situational awareness, tactical instructions, and covert surveillance related data during special operations reconnaissance and other missions. This article presents some of the work commissioned by the U. K. Ministry of Defence to assess the feasibility of using 60 GHz millimeter-wave smart antenna technology to provide covert communications capable of meeting these stringent networking needs. Recent advances in RF front-end technology, alongside physical layer transmission schemes that could be employed in millimeter-wave soldier-mounted radio, are discussed. The introduction of covert communications between soldiers will require the development of a bespoke directive medium access layer. A number of adjustments to the IEEE 802.11 distribution coordination function that will enable directional communications are suggested. The successful implementation of future smart antenna technologies and direction of arrival-based protocols will be highly dependent on thorough knowledge of transmission channel characteristics prior to deployment. A novel approach to simulating dynamic soldier-to-soldier signal propagation using state-of-the-art animation-based technology developed for computer game design is described, and important channel metrics such as root mean square angle and delay spread for a team of four networked infantry soldiers over a range of indoor and outdoor environments is reported.

In situ measurement of UHF wearable antenna radiation efficiency using a reverberation chamber

The radiation efficiency and resonance frequency of five compact antennas worn by nine individual test subjects was measured at 2.45 GHz in a reverberation chamber. The results show that, despite significant differences in body mass, wearable antenna radiation efficiency had a standard deviation less than 0.6 dB and the resonance frequency shift was less than 1% between test subjects. Variability in the radiation efficiency and resonance frequency shift between antennas was largely dependant on body tissue coupling which is related to both antenna geometry and radiation characteristics. The reverberation chamber measurements were validated using a synthetic tissue phantom and compared with results obtained in a spherical near field chamber and finite-difference time-domain (FDTD) simulation.

Antennas for over-body-surface communication at 2.45 GHz

In this paper, the on-body performance of a range of wearable antennas was investigated by measuring vertical bar S-21 vertical bar path gain between two devices mounted on tissue-equivalent numerical and experimental phantoms, representative of human muscle tissue at 2.45 GHz. In particular, the study focused on the performance of a compact higher mode microstrip patch antenna (HMMPA) with a profile as low as lambda/20. The 5- and 10-mm-high HMMPA prototypes had an impedance bandwidth of 6.7% and 8.6%, respectively, sufficient for the operating requirements of the 2.45-GHz industrial, scientific, and medical (ISM) band and both antennas offered 11-dB higher path gain compared to a fundamental-mode microstrip patch antenna. It was also dernonstrated that a 7-dB improvement in path gain can be obtained for a fundamental-mode patch through the addition of a shortening wall. Notably, on-body HMMPA performance was comparable to a quarter wave monopole antenna on the same size of ground-plane, mounted normal to the tissue surface, indicating that the low-profile and physically more robust antenna is a promising solution for bodyworn antenna applications.

Electro-thermal theory of intermodulation distortion in lossy microwave components

An analytic formulation of dynamic electro-thermally induced nonlinearity is developed for a general resistive element, yielding a self-heating circuit model based on a fractional derivative. The model explains the 10 dB/decade slope of the intermodulation products observed in two-tone testing. Two-tone testing at 400 MHz of attenuators, microwave chip terminations, and coaxial terminations is reported with tone spacing ranging from 1 to 100 Hz.

Subpixel interpolation architecture for multistandard video motion estimation

A new reconfigurable subpixel interpolation architecture for multistandard (e.g., MPEG-2, MPEG-4, H.264, and AVS) video motion estimation (ME) is presented. This exploits the mixed use of parallel and serial-input FIR filters to achieve high throughput rate and efficient silicon utilization. Silicon design studies show that this can be implemented using 34.8 × 10 3 gates with area and performance that compares very favorably with specific fixed solutions, e.g., for the H.264 standard alone. This can support SDTV and HDTV applications when implemented in 0.18 µm CMOS technology, with further performance enhancements achievable at 0.13 µm and below. © 2009 IEEE.

Hierarchical synthesis of complex DSP functions on FPGAs

SoC systems are now being increasingly constructed using a hierarchy of subsystems or silicon Intellectual Property (IP) cores. The key challenge is to use these cores in a highly efficient manner which can be difficult as the internal core structure may not be known. A design methodology based on synthesizing hierarchical circuit descriptions is presented. The paper employs the MARS synthesis scheduling algorithm within the existing IRIS synthesis flow and details how it can be enhanced to allow for design exploration of IP cores. It is shown that by accessing parameterised expressions for the datapath latencies in the cores, highly efficient FPGA solutions can be achieved. Hardware sharing at both the hierarchical and flattened levels is explored for a normalized lattice filter and results are presented.

Rapid design of biorthogonal wavelet transforms

A rapid design methodology for biorthogonal wavelet transform cores has been developed based on a generic, scaleable architecture for wavelet filters. The architecture offers efficient hardware utilisation by combining the linear phase property of biorthogonal filters with decimation in a MAC-based implementation. The design has been captured in VHDL and parameterised in terms of wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. The design time to produce silicon layout of a biorthogonal wavelet system is typically less than a day. The silicon cores produced are comparable in area and performance to hand-crafted designs, The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Linear QR architecture for a single chip adaptive beamformer

This paper presents the design of a novel single chip adaptive beamformer capable of performing 50 Gflops, (Giga-floating-point operations/second). The core processor is a QR array implemented on a fully efficient linear systolic architecture, derived using a mapping that allows individual processors for boundary and internal cell operations. In addition, the paper highlights a number of rapid design techniques that have been used to realise this system. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilisation of a library of parameterisable silicon intellectual property (IP) cores, to rapidly develop detailed silicon designs.