Adaptive Fusion Of Particle Filtering And Spatio-Temporal Motion Energy For Human Tracking

Object tracking is an active research area nowadays due to its importance in human computer interface, teleconferencing and video surveillance. However, reliable tracking of objects in the presence of occlusions, pose and illumination changes is still a challenging topic. In this paper, we introduce a novel tracking approach that fuses two cues namely colour and spatio-temporal motion energy within a particle filter based framework. We conduct a measure of coherent motion over two image frames, which reveals the spatio-temporal dynamics of the target. At the same time, the importance of both colour and motion energy cues is determined in the stage of reliability evaluation. This determination helps maintain the performance of the tracking system against abrupt appearance changes. Experimental results demonstrate that the proposed method outperforms the other state of the art techniques in the used test datasets.

Vibration based seismic damage identification procedure for a steel concentrically braced frame structure

An approach for seismic damage identification of a single-storey steel concentrically braced frame (CBF) structure is presented through filtering and double integration of a recorded acceleration signal. A band-pass filter removes noise from the acceleration signal followed by baseline correction being used to reduce the drift in velocity and displacement during numerical integration. The pre-processing achieves reliable numerical integration that predicts the displacement response accurately when compared to the measured lateral in-plane displacement of the CBF structure. The lateral displacement of the CBF structure is used to infer buckling and yielding of bracing members through seismic tests. The level of interstorey drift of the CBF during a seismic excitation allows the yield and buckling of the bracing members to be identified and indirectly detects damage based on exceedance of calculated displacement limits. The calculated buckling and yielding displacement threshold limits used to identify damage are demonstrated to accurately identify initial buckling and yielding in the bracing members.

Frequency Filtering of Torsional Alfvén Waves by Chromospheric Magnetic Field

In this Letter, we demonstrate how the observation of broadband frequency propagating torsional Alfvén waves in chromospheric magnetic flux tubes can provide valuable insight into their magnetic field structure. By implementing a full nonlinear three-dimensional magnetohydrodynamic numerical simulation with a realistic vortex driver, we demonstrate how the plasma structure of chromospheric magnetic flux tubes can act as a spatially dependent frequency filter for torsional Alfvén waves. Importantly, for solar magnetoseismology applications, this frequency filtering is found to be strongly dependent on magnetic field structure. With reference to an observational case study of propagating torsional Alfvén waves using spectroscopic data from the Swedish Solar Telescope, we demonstrate how the observed two-dimensional spatial distribution of maximum power Fourier frequency shows a strong correlation with our forward model. This opens the possibility of beginning an era of chromospheric magnetoseismology, to complement the more traditional methods of mapping the magnetic field structure of the solar chromosphere.

Design methodology for low power and arametric robustness through output-quality modulation:Application to color-interpolation filtering

Power dissipation and robustness to process variation have conflicting design requirements. Scaling of voltage is associated with larger variations, while Vdd upscaling or transistor upsizing for parametric-delay variation tolerance can be detrimental for power dissipation. However, for a class of signal-processing systems, effective tradeoff can be achieved between Vdd scaling, variation tolerance, and output quality. In this paper, we develop a novel low-power variation-tolerant algorithm/architecture for color interpolation that allows a graceful degradation in the peak-signal-to-noise ratio (PSNR) under aggressive voltage scaling as well as extreme process variations. This feature is achieved by exploiting the fact that all computations used in interpolating the pixel values do not equally contribute to PSNR improvement. In the presence of Vdd scaling and process variations, the architecture ensures that only the less important computations are affected by delay failures. We also propose a different sliding-window size than the conventional one to improve interpolation performance by a factor of two with negligible overhead. Simulation results show that, even at a scaled voltage of 77% of nominal value, our design provides reasonable image PSNR with 40% power savings. © 2006 IEEE.

An optimal algorithm for low power multiplierless FIR filter design using chebychev criterion

In this paper, we propose a novel finite impulse response (FIR) filter design methodology that reduces the number of operations with a motivation to reduce power consumption and enhance performance. The novelty of our approach lies in the generation of filter coefficients such that they conform to a given low-power architecture, while meeting the given filter specifications. The proposed algorithm is formulated as a mixed integer linear programming problem that minimizes chebychev error and synthesizes coefficients which consist of pre-specified alphabets. The new modified coefficients can be used for low-power VLSI implementation of vector scaling operations such as FIR filtering using computation sharing multiplier (CSHM). Simulations in 0.25um technology show that CSHM FIR filter architecture can result in 55% power and 34% speed improvement compared to carry save multiplier (CSAM) based filters.

Design methodology to trade off power, output quality and error resiliency: Application to color interpolation filtering

Power dissipation and tolerance to process variations pose conflicting design requirements. Scaling of voltage is associated with larger variations, while Vdd upscaling or transistor up-sizing for process tolerance can be detrimental for power dissipation. However, for certain signal processing systems such as those used in color image processing, we noted that effective trade-offs can be achieved between Vdd scaling, process tolerance and "output quality". In this paper we demonstrate how these tradeoffs can be effectively utilized in the development of novel low-power variation tolerant architectures for color interpolation. The proposed architecture supports a graceful degradation in the PSNR (Peak Signal to Noise Ratio) under aggressive voltage scaling as well as extreme process variations in. sub-70nm technologies. This is achieved by exploiting the fact that some computations are more important and contribute more to the PSNR improvement compared to the others. The computations are mapped to the hardware in such a way that only the less important computations are affected by Vdd-scaling and process variations. Simulation results show that even at a scaled voltage of 60% of nominal Vdd value, our design provides reasonable image PSNR with 69% power savings.

Pre-intravitrael injection preparation: endophthalmitis prevention and the importance of povidone-iodine

Despite adherence to strict standards of care in preparation for intravitreal injections, endophthalmitis can still occur. This article focuses on endophthalmitis and the importance of povidone-iodine in pre-procedure antisepsis. An overview of endophthalmitis and an examination of the benefits of povidone-iodine in ocular aseptic technique for the prevention of post-procedure endophthalmitis are provided. The misconceptions that patients and health practitioners may have in relation to povidone-iodine hypersensitivity are also explored.

Pre-charging and DC Fault Ride-Through of Hybri MMC Based HVDC Systems

Compared to half-bridge based MMCs, full-bridge based systems have the advantage of blocking dc fault, but at the expense of increased power semiconductors and power losses. In view of the relationships among ac/dc voltages and currents in full-bridge based MMC with the negative voltage state, this paper provides a detailed analysis on the link between capacitor voltage variation and the maximum modulation index. A hybrid MMC, consisting of mixed half-bridge and full-bridge circuits to combine their respective advantages is investigated in terms of its pre-charging process and transient dc fault ride-through capability. Simulation and experiment results demonstrate the feasibility and validity of the proposed strategy for a full-bridge based MMC and the hybrid MMC.

Introducing Students to Pre-Nineteenth-Century Poetry in the Language Classroom

We as language instructors are tasked with preparing students to transition from language to literature courses. The shorter length of many poems makes them ideal for presentation in the language classroom, where the acquisition of communicative competence is the priority. Introductory and intermediate textbooks’ poetry offerings, however, are frequently drawn from a canon of poems by only a few nineteenth- and twentieth-century authors (Verlaine, Apollinaire, Prévert) and fail to expose students to broader aspects of French literature. This article offers strategies for presenting pre-nineteenth-century poetry to first- and second-year students of French using dizains from Scève’s Délie as examples.

Systolic two-port adaptor for high performance wave digital filtering

The authors present a VLSI circuit for implementing wave digital filter (WDF) two-port adaptors. Considerable speedups over conventional designs have been obtained using fine grained pipelining. This has been achieved through the use of most significant bit (MSB) first carry-save arithmetic, which allows systems to be designed in which latency L is small and independent of either coefficient or input data wordlength. L is determined by the online delay associated with the computation required at each node in the circuit (in this case a multiply/add plus two separate additions). This in turn means that pipelining can be used to considerably enhance the sampling rate of a recursive digital filter. The level of pipelining which will offer enhancement is determined by L and is fine-grained rather than bit level. In the case of the circuit considered, L = 3. For this reason pipeline delays (half latches) have been introduced between every two rows of cells to produce a system with a once every cycle sample rate.