883 resultados para Symbolism in architecture
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This paper is a study of the full content of articles published by RPER, the Portuguese Review of Regional Studies, from the time it was launched in 2003 until the first quarter of 2015. RPER is a journal edited by the Portuguese section of the European Regional Science Association, which was established in the first half of the 1980s. The Association (APDR) and the journal are the result of contributions by researchers and technicians from different scientific fields, including mainly Economics, Geography, Sociology, Engineering and Architecture. The main focus of these contributions is the socio-economic life of concrete sites, and the way this life is conditioned by resources and capabilities, the historical and cultural heritage and institutions. Content analysis was undertaken to identify the main subjects chosen during the total period under analysis, the nature of the articles published (theoretical or empirical) and the main analytical framework used. The analysis also covers sub-periods to investigate major trends found in terms of subjects chosen and analytical methods, questioning the rationale behind them. The paper concludes with a few notes regarding the social echo the research received and an identification of the main limitations of the research. In the first part of the article, we conduct a summary review of the genesis and evolution of Regional Science at international level to serve as a basis for the empirical approach developed.
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The increase in life expectancy with a decrease in birth rates is contributing to the ageing of the European population. This phenomenon, coupled with greater awareness of the quality of life, the need to have cost-efficient assistive care, the intention of people to live independently in their homes, and the technological developments in recent decades, have contributed to the emergence of the concept of ambient assisted living (AAL). AAL solutions aim to provide healthy and safe ageing to users through promoting independence in performing daily activities and interacting with technology, taking into consideration the deterioration of the users’ capabilities and the reduced costs of the solutions. In this chapter, AAL developments of monitoring activities of daily living (ADLs) and participation in a virtual community with the selected stakeholders are introduced, their roadmap with the expected technological developments are described, and the expected impact of these solutions on the end users of the developed solutions are discussed. This enables a real user guidance structure that represents the different needs and limitations of each user, presenting a highly structured project based on personas and possible solutions for them. The AAL4ALL Ambient Assisted Living for All (ALL4ALL) project is considered here as a case study to analyze and illustrate the ALL concepts discussed in this chapter.
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Early loss of splenic Tfh cells in SIV-infected rhesus macaques
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Dissertação de mestrado integrado em Arquitectura
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The genus Peristethium, characterized by determinate inflorescences protected by deciduous bracts, occurs in the northwest of South America, as well as Costa Rica and Panama. The main objective of this paper was to transfer one species to what we believe is its correct generic placement in Peristethium, that likewise implies in a shift of the genus' distribution beyond the Amazon. A new combination, Peristethium reticulatum, is proposed, based on Struthanthus reticulatus, described from Tocantins in 1980. The sexual dimorphism of the inflorescences of P. reticulatum (sessile male flowers and pedicellate female flowers) associated with male inflorescences that are inserted at leafless nodes are unique within the genus. The male flowers have dimorphic stamens, well-developed anthers and a pistiloid, whilst female flowers have robust styles and stigmas, and much reduced staminodes. Peristethium reticulatum and P. polystachyum occurs in the Amazon regions of Brazil, with the former recorded also in the ecotone with the Central Brazilian savannas (Cerrados).
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Dissertação de mestrado em Bioquímica Aplicada – Biomedicina
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Dissertação de mestrado integrado em Engenharia Biomédica (área de especialização em Engenharia Clínica)
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Tese de Doutoramento em Engenharia de Eletrónica e de Computadores
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Dissertação de Mestrado (Programa Doutoral em Informática)
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Current data mining engines are difficult to use, requiring optimizations by data mining experts in order to provide optimal results. To solve this problem a new concept was devised, by maintaining the functionality of current data mining tools and adding pervasive characteristics such as invisibility and ubiquity which focus on their users, providing better ease of use and usefulness, by providing autonomous and intelligent data mining processes. This article introduces an architecture to implement a data mining engine, composed by four major components: database; Middleware (control); Middleware (processing); and interface. These components are interlinked but provide independent scaling, allowing for a system that adapts to the user’s needs. A prototype has been developed in order to test the architecture. The results are very promising and showed their functionality and the need for further improvements.
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Dissertação de mestrado integrado em Engenharia de Telecomunicações e Informática
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v.31:no.34(1949)
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Nowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These applications also imply huge implementation challenges. Such example is building a high data rate transceiver which at the same time would have very low power consumption. In this paper we present a prototype of Single Carrier -SC transceiver system, illustrating a brief overview of the baseband design, emphasizing the most important decisions that need to be done. A brief overview of the possible approaches when implementing the equalizer, as the most complex module in the SC transceiver, is also presented. The main focus of this paper is to suggest a parallel architecture for the receiver in a Single Carrier communication system. This would provide higher data rates that the communication system canachieve, for a price of higher power consumption. The suggested architecture of such receiver is illustrated in this paper,giving the results of its implementation in comparison with its corresponding serial implementation.
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The modern computer systems that are in use nowadays are mostly processor-dominant, which means that their memory is treated as a slave element that has one major task – to serve execution units data requirements. This organization is based on the classical Von Neumann's computer model, proposed seven decades ago in the 1950ties. This model suffers from a substantial processor-memory bottleneck, because of the huge disparity between the processor and memory working speeds. In order to solve this problem, in this paper we propose a novel architecture and organization of processors and computers that attempts to provide stronger match between the processing and memory elements in the system. The proposed model utilizes a memory-centric architecture, wherein the execution hardware is added to the memory code blocks, allowing them to perform instructions scheduling and execution, management of data requests and responses, and direct communication with the data memory blocks without using registers. This organization allows concurrent execution of all threads, processes or program segments that fit in the memory at a given time. Therefore, in this paper we describe several possibilities for organizing the proposed memory-centric system with multiple data and logicmemory merged blocks, by utilizing a high-speed interconnection switching network.
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Advances in computer memory technology justify research towards new and different views on computer organization. This paper proposes a novel memory-centric computing architecture with the goal to merge memory and processing elements in order to provide better conditions for parallelization and performance. The paper introduces the architectural concepts and afterwards shows the design and implementation of a corresponding assembler and simulator.