920 resultados para multi-layer dielectric
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We present a method for determining the globally optimal on-line learning rule for a soft committee machine under a statistical mechanics framework. This rule maximizes the total reduction in generalization error over the whole learning process. A simple example demonstrates that the locally optimal rule, which maximizes the rate of decrease in generalization error, may perform poorly in comparison.
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In this paper we propose a novel type of multiple-layer photomixer based on amorphous/nano-crystalline-Si. Such a device implies that it could be possible to enhance the conversion efficiency from optical power to THz emission by increasing the absorption length and by reducing the device overheating through the use of substrates with higher thermal conductivity compared to GaAs. Our calculations show that the output power from a two-layer Si-based photomixer is at least ten times higher than that from conventional LT-GaAs photomixers at 1 THz.
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Novel surface plasmonic optical fiber sensors have been fabricated using multiple coatings deposited on a lapped section of a single mode fiber. UV laser irradiation processing with a phase mask produces a nano-scaled surface relief grating structure resembling nano-wires. The resulting individual corrugations produced by material compaction are approximately 20 μm long with an average width at half maximum of 100 nm and generate localized surface plasmons. Experimental data are presented that show changes in the spectral characteristics after UV processing, coupled with an overall increase in the sensitivity of the devices to surrounding refractive index. Evidence is presented that there is an optimum UV dosage (48 joules) over which no significant additional optical change is observed. The devices are characterized with regards to change in refractive index, where significantly high spectral sensitivities in the aqueous index regime are found, ranging up to 4000 nm/RIU for wavelength and 800 dB/RIU for intensity. © 2013 Optical Society of America.
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The popularity of online social media platforms provides an unprecedented opportunity to study real-world complex networks of interactions. However, releasing this data to researchers and the public comes at the cost of potentially exposing private and sensitive user information. It has been shown that a naive anonymization of a network by removing the identity of the nodes is not sufficient to preserve users’ privacy. In order to deal with malicious attacks, k -anonymity solutions have been proposed to partially obfuscate topological information that can be used to infer nodes’ identity. In this paper, we study the problem of ensuring k anonymity in time-varying graphs, i.e., graphs with a structure that changes over time, and multi-layer graphs, i.e., graphs with multiple types of links. More specifically, we examine the case in which the attacker has access to the degree of the nodes. The goal is to generate a new graph where, given the degree of a node in each (temporal) layer of the graph, such a node remains indistinguishable from other k-1 nodes in the graph. In order to achieve this, we find the optimal partitioning of the graph nodes such that the cost of anonymizing the degree information within each group is minimum. We show that this reduces to a special case of a Generalized Assignment Problem, and we propose a simple yet effective algorithm to solve it. Finally, we introduce an iterated linear programming approach to enforce the realizability of the anonymized degree sequences. The efficacy of the method is assessed through an extensive set of experiments on synthetic and real-world graphs.
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应用于啁啾脉冲放大技术中的脉宽压缩光栅是基于多层膜作为基底,利用全息干涉技术和离子束技术刻蚀而成。脉宽压缩光栅的衍射效率和抗激光损伤阈值一方面依赖于光栅结构的设计,另一方面很大程度上取决于作为基底的多层膜的设计。给出了以413.1nm作为写入波长,1053nm作为使用波长的多层介质光栅膜的设计.样品在ZZS-800F、型真空镀膜机上采用电子束蒸发方式沉积而成,并给出了膜系结构对光学性能影响因素的详细分析,结果表明膜系H3L(H2L)^9H0.5L2.03H满足光栅膜的指标。给出了样品光学特性测试,其使用波
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对多层介质膜光栅以及介质膜反射镜的激光损伤阈值进行了系统的研究。测试方法采用国际测试标准。测试结果表明,介质光栅的损伤阈值远低于未刻蚀的多层介质膜。对样品损伤形貌的扫描电镜照片分析发现,相比于未刻蚀的多层介质膜,介质膜光栅的初始损伤主要发生在光栅槽形的侧壁,且损伤主要是由驻波场的空间分布引起的本征吸收、制备过程中引入的杂质污染以及刻蚀过程中HfO2的化学计量机失衡引起的。
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利用傅里叶模式理论分析了TE波自准直角入射的使用条件下,多层介质膜光栅的光栅区和多层膜区电场分布的特点.分别讨论了HfO2和SiO2为顶层光栅材料时,光栅结构参数对光栅脊峰值电场的影响,结果表明,对于不同膜厚的顶层材料,存在一个最佳膜厚度,使光栅脊峰值电场最小,并且当膜厚增大时,设计大高宽比的光栅可以降低该电场峰值.最后,在大角度条件下使用多层膜光栅也可以降低光栅脊处的峰值电场.
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以薄膜光学的干涉理论和衍射光学的傅里叶模式理论为基础,给出了0.8μm飞秒激光器用多层介质膜脉宽压缩光栅的理论设计;设计采用H3L(HL)^9H0.5L2.4H的多层介质膜为基底,当刻蚀后表面浮雕结构的占宽比为0.35,线密度为1480线/mm,槽深为0.2μm,顶层HfO2的剩余厚度为0.15μm时,对于Littrow角度(36.7°)和TE波模式入射的衍射光栅其-1级衍射效率达到95%以上.
Resumo:
给出了以413nm作为写入波长,1053nm作为使用波长的多层介质光栅膜的设计,计算表明膜系H3L(H2L)·9H0.5L2.03H满足光栅膜的要求.最后给出了制备得到的样品光学特性测试,结果表明在使用渡长和曝光波长处满足设计要求,其抗激光损伤阈值在光正入射和51.2°入射时分别为14.14J/cm^2和9.32J/cm^2,膜系的应力表现为压应力.
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基于严格耦合波理论建立了多层介质膜光栅的衍射机理模型,给出了TE波自准直条件下多层介质膜光栅衍射效率的表达式.以-1级衍射效率为评价函数,分析了表面浮雕结构分别为HfO2和SiO2材料的介质膜光栅获得衍射效率优于96%的结构参数.数值计算表明,顶层材料为HfO2的介质膜光栅具有更宽的结构选择范围.最后分析了介质膜光栅的制备容差和允许的入射角度范围.
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We report on the design of a high diffraction efficiency multi-layer dielectric grating with wide incident angle and broad bandwidth for 800 nm. The optimized grating can achieve > 95% diffraction efficiency in the first order at an incident angle of 5 degrees from Littrow and a wavelength from 770nm to 830 nm, with peak diffraction efficiency of > 99.5% at 800 nm. The electric field distribution of the optimized multi-layer dielectric grating within the gratings ridge is 1.3 times enhancement of the incidence light, which presents potential high laser resistance ability. Because of its high-efficiency, wide incident, broad bandwidth and potential high resistance ability, the multi-layer dielectric grating should have practical application in Ti:sapphire laser systems.
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基于严格耦合波理论建立了梯形介质膜光栅的衍射机理模型,利用该模型讨论了底角为70°的梯形介质膜光栅-1级的衍射行为。通过对梯形介质膜光栅的占空比、槽深和剩余厚度的优化,设计了应用于1053 nm和51.2°角度入射的梯形介质膜光栅。对于顶层为HfO2的介质膜光栅,当槽深为200 nm,剩余厚度为100 nm,占空比为0.35时,其衍射效率优于99.5%,而对于顶层为SiO2的梯形光栅,为获得99.5%的衍射效率,其槽深为800 nm,剩余厚度为320 nm。而且,获得同样的衍射效率,顶层为HfO2的梯形光栅具有更宽的光谱特性。数值计算表明,严格耦合波理论模型对梯形介质膜光栅衍射效率的计算具有很好的收敛性和稳定性。
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Lead magnesium niobate-lead titanate (PMN-PT) is an intriguing candidate for applications in many electronic devices such as multi-layer capacitors, electro-mechanical transducers etc. because of its high dielectric constant, low dielectric loss and high strain near the Curie temperature. As an extension of our previous work on Ta-doped PMNT-PT aimed at optimizing the performance and reducing the cost, this paper focuses on the effect of Pb volatilization on the dielectric properties of 0.77Pb(Mg1/3(Nb0.9Ta0.1)2/3)O3-0.23PbTiO3. The dielectric constant and loss of the samples are measured at different frequencies and different temperatures. The phase purity of this compound is determined by X-ray diffraction pattern. It is found that the volatilization during sintering does influence the phase formation and dielectric properties. The best condition is sintering with 0.5 g extra PbO around a 4 g PMNT-PT sample.
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The present success in the manufacture of multi-layer interconnects in ultra-large-scale integration is largely due to the acceptable planarization capabilities of the chemical-mechanical polishing (CMP) process. In the past decade, copper has emerged as the preferred interconnect material. The greatest challenge in Cu CMP at present is the control of wafer surface non-uniformity at various scales. As the size of a wafer has increased to 300 mm, the wafer-level non-uniformity has assumed critical importance. Moreover, the pattern geometry in each die has become quite complex due to a wide range of feature sizes and multi-level structures. Therefore, it is important to develop a non-uniformity model that integrates wafer-, die- and feature-level variations into a unified, multi-scale dielectric erosion and Cu dishing model. In this paper, a systematic way of characterizing and modeling dishing in the single-step Cu CMP process is presented. The possible causes of dishing at each scale are identified in terms of several geometric and process parameters. The feature-scale pressure calculation based on the step-height at each polishing stage is introduced. The dishing model is based on pad elastic deformation and the evolving pattern geometry, and is integrated with the wafer- and die-level variations. Experimental and analytical means of determining the model parameters are outlined and the model is validated by polishing experiments on patterned wafers. Finally, practical approaches for minimizing Cu dishing are suggested.
Resumo:
The present success in the manufacture of multi-layer interconnects in ultra-large-scale integration is largely due to the acceptable planarization capabilities of the chemical-mechanical polishing (CMP) process. In the past decade, copper has emerged as the preferred interconnect material. The greatest challenge in Cu CMP at present is the control of wafer surface non-uniformity at various scales. As the size of a wafer has increased to 300 mm, the wafer-level non-uniformity has assumed critical importance. Moreover, the pattern geometry in each die has become quite complex due to a wide range of feature sizes and multi-level structures. Therefore, it is important to develop a non-uniformity model that integrates wafer-, die- and feature-level variations into a unified, multi-scale dielectric erosion and Cu dishing model. In this paper, a systematic way of characterizing and modeling dishing in the single-step Cu CMP process is presented. The possible causes of dishing at each scale are identified in terms of several geometric and process parameters. The feature-scale pressure calculation based on the step-height at each polishing stage is introduced. The dishing model is based on pad elastic deformation and the evolving pattern geometry, and is integrated with the wafer- and die-level variations. Experimental and analytical means of determining the model parameters are outlined and the model is validated by polishing experiments on patterned wafers. Finally, practical approaches for minimizing Cu dishing are suggested.