1000 resultados para atomic clock
Resumo:
With respect to GaAs epitaxial lift-off technology, we report here the optimum atomic spacing (5-10 nm) needed to etch off the AlAs release layer that is sandwiched between two GaAs epitaxial layers. The AlAs etching rate in hydrofluoric acid based solutions was monitored as a function of release layer thickness. We found a sudden quenching in the etching rate, approximately 20 times that of the peak value, at lower dimensions (similar to2.5 nm) of the AlAs epitaxial layer. Since this cannot be explained on the basis of a previous theory (inverse square root of release layer thickness), we propose a diffusion-limited mechanism to explain this reaction process. With the diffusion constant being a mean-free-path-dependent parameter, a relation between the mean free path and the width of the channel is considered. This relation is in reasonable agreement with the experimental results and gives a good physical insight to the reaction kinetics.
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In this paper, we propose a novel and efficient algorithm for modelling sub-65 nm clock interconnect-networks in the presence of process variation. We develop a method for delay analysis of interconnects considering the impact of Gaussian metal process variations. The resistance and capacitance of a distributed RC line are expressed as correlated Gaussian random variables which are then used to compute the standard deviation of delay Probability Distribution Function (PDF) at all nodes in the interconnect network. Main objective is to find delay PDF at a cheaper cost. Convergence of this approach is in probability distribution but not in mean of delay. We validate our approach against SPICE based Monte Carlo simulations while the current method entails significantly lower computational cost.
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We demonstrate launching of laser-cooled Yb atoms in a cold atomic fountain. Atoms in a collimated thermal beam are first cooled and captured in a magneto-optical trap (MOT) operating on the strongly allowed S-1(0) -> P-1(1) transition at 399 nm (blue line). They are then transferred to a MOT on the weakly allowed S-1(0) -> P-3(1) transition at 556 nm (green line). Cold atoms from the green MOT are launched against gravity at a velocity of around 2.5 m/s using a pair of green beams. We trap more than 107 atoms in the blue MOT and transfer up to 70% into the green MOT. The temperature for the odd isotope Yb-171 is similar to 1 mK in the blue MOT, and reduces by a factor of 40 in the green MOT.
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Chemical shifts of K absorption discontinuities, Delta E, of several manganese, iron and cobalt oxides with the metal in the formal oxidation states between +2 and +4, have been measured. These data, together with data in the literature on other compounds of these metals, can be fitted into the expression Delta E=aq+bq2, where q is the effective atomic charge on the metal. Theoretical considerations also support this functional relationship between Delta E and q.
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X-ray crystallographlc studies on 3′–5′ ollgomers have provided a great deal of information on the stereochemistry and conformational flexibility of nucleic acids and polynucleotides. In contrast, there is very little Information available on 2′–5′ polynucleotides. We have now obtained the crystal structure of Cytidylyl-2′,5′-Adenoslne (C2′p5′A) at atomic resolution to establish the conformational differences between these two classes of polymers. The dlnucleoside phosphate crystallises in the monocllnlc space group C2, with a = 33.912(4)Å, b =16.824(4)Å, c = 12.898(2)Å and 0 = 112.35(1) with two molecules in the asymmetric unit. Spectacularly, the two independent C2′p5′A molecules in the asymmetric unit form right handed miniature parallel stranded double helices with their respective crystallographic two fold (b axis) symmetry mates. Remarkably, the two mini duplexes are almost indistinguishable. The cytosines and adenines form self-pairs with three and two hydrogen bonds respectively. The conformation of the C and A residues about the glycosyl bond is anti same as in the 3′–5′ analog but contrasts the anti and syn geometry of C and A residues in A2′p5′C. The furanose ring conformation is C3′endo, C2′endo mixed puckering as in the C3′p5′A-proflavine complex. A comparison of the backbone torsion angles with other 2′–5′ dinucleoside structures reveals that the major deviations occur in the torsion angles about the C3′–C2′ and C4′-C3′ bonds. A right-handed 2′–5′ parallel stranded double helix having eight base pairs per turn and 45° turn angle between them has been constructed using this dinucleoside phosphate as repeat unit. A discussion on 2′–5′ parallel stranded double helix and its relevance to biological systems is presented.
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Atomic layer deposition (ALD) is a method to deposit thin films from gaseous precursors to the substrate layer-by-layer so that the film thickness can be tailored with atomic layer accuracy. Film tailoring is even further emphasized with selective-area ALD which enables the film growth to be controlled also on the substrate surface. Selective-area ALD allows the decrease of a process steps in preparing thin film devices. This can be of a great technological importance when the ALD films become into wider use in different applications. Selective-area ALD can be achieved by passivation or activation of a surface. In this work ALD growth was prevented by octadecyltrimethoxysilane, octadecyltrichlorosilane and 1-dodecanethiol SAMs, and by PMMA (polymethyl methacrylate) and PVP (poly(vinyl pyrrolidone) polymer films. SAMs were prepared from vapor phase and by microcontact printing, and polymer films were spin coated. Microcontact printing created patterned SAMs at once. The SAMs prepared from vapor phase and the polymer mask layers were patterned by UV lithography or lift-off process so that after preparation of a continuous mask layer selected areas of them were removed. On these areas the ALD film was deposited selectively. SAMs and polymer films prevented the growth in several ALD processes such as iridium, ruthenium, platinum, TiO2 and polyimide so that the ALD films did grow only on areas without SAM or polymer mask layer. PMMA and PVP films also protected the surface against Al2O3 and ZrO2 growth. Activation of the surface for ALD of ruthenium was achieved by preparing a RuOX layer by microcontact printing. At low temperatures the RuCp2-O2 process nucleated only on this oxidative activation layer but not on bare silicon.
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Glassy B&, the parent compound of the superionic conductor LiI-Li&B& has been studied by the molecular dynamics technique using a new potential model. The results suggest that the glass is made up of local units of four-membered B2S2 rings bridged by sulfur atoms, leading to a chainlike structure. Various pair correlation functions have been analyzed, and the B2Sz rings have been found to be planar. The calculated neutron structure factor shows a peak at 1.4 A-' which has been attributed to B-B correlations at 5.6 A. The glass transition temperature of the simulated system has been calculated to be around 800 K.
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In this paper, we propose a new token-based distributed algorithm for total order atomic broadcast. We have shown that the proposed algorithm requires lesser number of messages compared to the algorithm where broadcast servers use unicasting to send messages to other broadcast servers. The traditional method of broadcasting requires 3(N - 1) messages to broadcast an application message, where N is the number of broadcast servers present in the system. In this algorithm, the maximum number of token messages required to broadcast an application message is 2N. For a heavily loaded system, the average number of token messages required to broadcast an application message reduces to 2, which is a substantial improvement over the traditional broadcasting approach.
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Tracer diffusion coefficients are calculated in different phases in the Mo-Si system from diffusion couple experiments using the data available on thermodynamic parameters. Following, possible atomic diffusion mechanism of the species is discussed based on the crystal structure. Unusual diffusion behaviour is found in the Mo(5)Si(3) and Mo(3)Si phases, which indicate the nature of defects present on different sublattices. Further the growth mechanism of the phases is discussed and morphological evolution during interdiffusion is explained. (C) 2011 Elsevier Ltd. All rights reserved.
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Substantial amount of fixed charge present in most of the alternative gate dielectrics gives rise to large shifts in the flat-band voltage (VFB) and charge trapping and de-trapping causes hysterectic changes on voltage cycling. Both phenomena affect stable and reliable transistor operation. In this paper we have studied for the first time the effect of post-metallization hydrogen annealing on the C-V curve of MOS capacitors employing zirconia, one of the most promising gate dielectric. Samples were annealed in hydrogen ambient for up to 30 minutes at different temperatures ranging from room temperature to 400°C. C-V measurements were done after annealing at each temperature and the hysteresis width was calculated from the C-V curves. A minimum hysteresis width of ∼35 mV was observed on annealing the sample at 200°C confirming the excellent suitability of this dielectric
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In this work, we evaluate performance of a real-world image processing application that uses a cross-correlation algorithm to compare a given image with a reference one. The algorithm processes individual images represented as 2-dimensional matrices of single-precision floating-point values using O(n4) operations involving dot-products and additions. We implement this algorithm on a nVidia GTX 285 GPU using CUDA, and also parallelize it for the Intel Xeon (Nehalem) and IBM Power7 processors, using both manual and automatic techniques. Pthreads and OpenMP with SSE and VSX vector intrinsics are used for the manually parallelized version, while a state-of-the-art optimization framework based on the polyhedral model is used for automatic compiler parallelization and optimization. The performance of this algorithm on the nVidia GPU suffers from: (1) a smaller shared memory, (2) unaligned device memory access patterns, (3) expensive atomic operations, and (4) weaker single-thread performance. On commodity multi-core processors, the application dataset is small enough to fit in caches, and when parallelized using a combination of task and short-vector data parallelism (via SSE/VSX) or through fully automatic optimization from the compiler, the application matches or beats the performance of the GPU version. The primary reasons for better multi-core performance include larger and faster caches, higher clock frequency, higher on-chip memory bandwidth, and better compiler optimization and support for parallelization. The best performing versions on the Power7, Nehalem, and GTX 285 run in 1.02s, 1.82s, and 1.75s, respectively. These results conclusively demonstrate that, under certain conditions, it is possible for a FLOP-intensive structured application running on a multi-core processor to match or even beat the performance of an equivalent GPU version.
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Multiple Clock Domain processors provide an attractive solution to the increasingly challenging problems of clock distribution and power dissipation. They allow their chips to be partitioned into different clock domains, and each domain’s frequency (voltage) to be independently configured. This flexibility adds new dimensions to the Dynamic Voltage and Frequency Scaling problem, while providing better scope for saving energy and meeting performance demands. In this paper, we propose a compiler directed approach for MCD-DVFS. We build a formal petri net based program performance model, parameterized by settings of microarchitectural components and resource configurations, and integrate it with our compiler passes for frequency selection.Our model estimates the performance impact of a frequency setting, unlike the existing best techniques which rely on weaker indicators of domain performance such as queue occupancies(used by online methods) and slack manifestation for a particular frequency setting (software based methods).We evaluate our method with subsets of SPECFP2000,Mediabench and Mibench benchmarks. Our mean energy savings is 60.39% (versus 33.91% of the best software technique)in a memory constrained system for cache miss dominated benchmarks, and we meet the performance demands.Our ED2 improves by 22.11% (versus 18.34%) for other benchmarks. For a CPU with restricted frequency settings, our energy consumption is within 4.69% of the optimal.
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An all-digital on-chip clock skew measurement system via subsampling is presented. The clock nodes are sub-sampled with a near-frequency asynchronous sampling clock to result in beat signals which are themselves skewed in the same proportion but on a larger time scale. The beat signals are then suitably masked to extract only the skews of the rising edges of the clock signals. We propose a histogram of the arithmetic difference of the beat signals which decouples the relationship of clock jitter to the minimum measurable skew, and allows skews arbitrarily close to zero to be measured with a precision limited largely by measurement time, unlike the conventional XOR based histogram approach. We also analytically show that the proposed approach leads to an unbiased estimate of skew. The measured results from a 65 nm delay measurement front-end indicate that for an input skew range of +/- 1 fan-out-of-4 (FO4) delay, +/- 3 sigma resolution of 0.84 ps can be obtained with an integral error of 0.65 ps. We also experimentally demonstrate that a frequency modulation on a sampling clock maintains precision, indicating the robustness of the technique to jitter. We also show how FM modulation helps in restoring precision in case of rationally related clocks.