995 resultados para Lateral bipolar junction transistors


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This paper presents a comprehensive theoretical study of the Trench Insulated Gate Bipolar Transistors (TIGBT). Specific physical and geometrical effects, such as the accumulation layer injection, increased channel density, increased channel charge and transversal electric field modulation are discussed. The potential advantages of the Trench IGBT over its conventional planar variant are highlighted. It is concluded that the Trench IGBT is one of the most promising structures in the area of high voltage MOS-controllable switching devices.

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This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18-μm partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an R dson of 765 mΩ ̇ mm 2. It exhibits half the value of specific on-state resistance R dson and three times higher saturation current (I dsat) for the same BV, compared to a comparable lateral superjunction laterally diffused metal-oxide-semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in R dson at 175°C, compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18-μm PSOI HV process. © 2012 IEEE.

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This book presents physics-based models of bipolar power semiconductor devices and their implementation in MATLAB and Simulink. The devices are subdivided into different regions, and the operation in each region, along with the interactions at the interfaces which are analyzed using basic semiconductor physics equations that govern their behavior. The Fourier series solution is used to solve the ambipolar diffusion equation in the lightly doped drift region of the devices. In addition to the external electrical characteristics, internal physical and electrical information, such as the junction voltages and the carrier distribution in different regions of the device, can be obtained using the models. Table of Contents: Introduction to Power Semiconductor Device Modeling/Physics of Power Semiconductor Devices/Modeling of a Power Diode and IGBT/IGBT Under an Inductive Load-Switching Condition in Simulink/Parameter Extraction. © 2013 by Morgan & Claypool.

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The effect of the bandgap narrowing (BGN) on performance of power devices is investigated in detail in this paper. The analysis reveals that the change in the energy band structure caused by BGN can strongly affect the conductivity modulation of the bipolar devices resulting in a completely different performance. This is due to the modified injection efficiency under high-level injection conditions. Using a comprehensive analysis of the injection efficiency in a p-n junction, an analytical model for this phenomenon is developed. BGN model tuning has been proved to be essential in accurately predicting the performance of a lateral insulated-gate bipolar transistor (IGBT). Other devices such as p-i-n diodes or punch-through IGBTs are significantly affected by the BGN, while others, such as field-stop IGBTs or power MOSFETs, are only marginally affected. © 2013 IEEE.

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An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mω.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps. © 2013 IEEE.

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A 200V lateral insulated gate bipolar transistor (LIGBT) was successfully developed using lateral superjunction (SJ) in 0.18μm partial silicon on insulator (SOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations. For an n-type lateral SJ LIGBT, the p layer in the SJ drift region helps in achieving uniform electric field distribution. Furthermore, the p-pillar contributes to the on-state current. Furthermore, the p-pillar contributes to sweep out holes during the turn-off process, thus leading to faster removal of plasma. To realize this device, one additional mask layer is required in the X-FAB 0.18μm partial SOI HV process. © 2013 IEEE.

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With a crystal orientation dependent on the etch rate of Si in KOH-based solution, a base-emitter self-aligned large-area multi-linger configuration power SiGe heterojunction bipolar transistor (HBT) device (with an emitter area of about 880 mu m(2)) is fabricated with 2 mu m double-mesa technology. The maximum dc current gain is 226.1. The collector-emitter junction breakdown voltage BVCEO is 10 V and the collector-base junction breakdown voltage BVCBO is 16 V with collector doping concentration of 1 x 10(17) cm(-3) and thickness of 400 nm. The device exhibited a maximum oscillation frequency f(max) of 35.5 GHz and a cut-off frequency f(T) of 24.9 GHz at a dc bias point of I-C = 70 mA and the voltage between collector and emitter is V-CE = 3 V. Load pull measurements in class-A operation of the SiGe HBT are performed at 1.9 GHz with input power ranging from 0 dBm to 21 dBm. A maximum output power of 29.9 dBm (about 977 mW) is obtained at an input power of 18.5 dBm with a gain of 11.47 dB. Compared to a non-self-aligned SiGe HBT with the same heterostructure and process, f(max) and f(T) are improved by about 83.9% and 38.3%, respectively.

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AlGaN/GaN npn heterojunction bipolar transistor structures were grown by low-pressure MOCVD. Secondary ion mass spectroscopy (SIMS) measurements were carried out to study the Mg memory effect and redistribution in the emitter-base junction. The results indicated that there is a Mg-rich film formed in the ongrowing layer after the Cp2Mg source is switched off. The Mg-rich film can be confined in the base section by switching off the Cp2Mg source for appropriate time before the end of base growth. Low temperature growth of the undoped GaN spacer suppresses the Mg redistribution from Mg rich film. The delay rate of the Mg profile in sample C with spacer growing in low temperature is about 56 nm/decade, which becomes sharper than 80 nm/decade of the samples A and B without low temperature spacer. (C) 2005 Elsevier Ltd. All rights reserved.

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N-p-n Si/SiGe/Si heterostructure has been grown by a disilane (Si2H6) gas and Ge solid sources molecular beam epitaxy system using phosphine (PH3) and diborane (B2H6) as n- and p-type in situ doping sources, respectively. X-ray diffraction (XRD) and secondary ion mass spectroscopy (SIMS) measurements show that the grown heterostructure has a good quality, the boron doping is confined to the SiGe base layer, and the Ge has a trapezoidal profile. Postgrowth P implantation was performed to prepare a good ohmic contact to the emitter. Heterojunction bipolar transistor (HBT) has been fabricated using the grown heterostructure and a common-emitter current gain of 75 and a cut-off frequency of 20 GHz at 300 K have been obtained. (C) 2001 Elsevier Science B.V. All rights reserved.

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Three n-p-n Si/SiGe/Si heterostructures with different layer thickness and doping concentration have been grown by a home-made gas source molecular-beam epitaxy (GSMBE) system using phosphine (PH3) and diborane (B2H6) as n-and p-type in situ doping sources, respectively. Heterojunction bipolar transistors (HBTs) have been fabricated using these structures and a current gain of 40 at 300 K and 62 at 77 K have been obtained. The influence of thickness and doping concentration of the deposited layers on the current gain of the HBTs is discussed. (C) 2000 Elsevier Science B.V. All rights reserved.

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A multi-finger structure power SiGe HBT device (with an emitter area of about 166μm^2) is fabricated with very simple 2μm double-mesa technology. The DC current gain β is 144.25. The B-C junction breakdown voltage reaches 9V with a collector doping concentration of 1 × 10^17cm^-3 and a collector thickness of 400nm. Though our data are influenced by large additional RF probe pads, the device exhibits a maximum oscillation frequency fmax of 10.1GHz and a cut-off frequency fτ of 1.8GHz at a DC bias point of IC=10mA and VCE = 2.5V.

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The high temperature (300~480K) characteristics of the n-3C-SiC/p-Si heterojunction diodes (HJD) fabricated by low-pressure chemical vapor deposition on Si (100) substrates are investigated.The obtained diode with best rectifying properties has 1.8×104 of ratio at room temperature,and slightly rectifying characteristics with 3.1 of rectification ratio is measured at 480K of an ambient temperature .220V of reverse breakdown voltage is acquired at 300K.Capacitance-voltage characteristics show that the abrupt junction model is applicable to the SiC/Si HJD structure and the built-in voltage is 0.75V.An ingenious equation is employed to perfectly simulate and explain the forward current density-voltage data measured at various temperatures.The 3C-SiC/Si HJD represents a promising approach for the fabrication of high quality heterojunction devices such as SiC-emitter heterojunction bipolar transistors.

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The relationship between the performance characteristics of organic field-effect transistors (OFETs) with 2,5-bis(4-biphenylyl)-bithiophene/copper hexadecafluorophthalocyanine (BP2T/F16CuPc) heterojunctions and the thickness of the BP2T bottom layer is investigated. Three operating modes (n-channel, ambipolar, and p-channel) are obtained by varying the thickness of the organic semiconductor layer. The changes in operating mode are attributable to the morphology of the film and the hetero-junction effect, which also leads to an evolution of the field-effect mobility with increasing film thickness. In BP2T/F16CuPc heterojunctions the mobile charge carriers accumulate at both sides of the heterojunction interface, with an accumulation layer thickness of ca. 10 nm. High field-effect mobility values can be achieved in continuous and flat films that exhibit the heterojunction effect.

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Novel diode test structures have been manufactured to characterize long-range dopant diffusion in tungsten silicide layers. A tungsten silicide to p-type silicon contact has been characterized as a Schottky barrier rectifying contact with a silicide work function of 4.8 eV. Long-range diffusion of boron for an anneal at 900 °C for 30 min has been shown to alter this contact to become ohmic. Long-range diffusion of phosphorus with a similar anneal alters the contact to become a bipolar n-p diode. Bipolar diode action is demonstrated experimentally for anneal schedules of 30 min at 900 °C, indicating long-range diffusion of phosphorus (~38 µm), SIMS analysis shows dopant redistribution is adversely affected by segregation to the silicide/oxide interface. The concept of conduit diffusion has been demonstrated experimentally for application in advanced bipolar transistor technology. © 2009 IEEE.

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The buried oxide (BOX) layer in silicon on insulator (SOI) was replaced by a compound buried layer (CBL) containing layers of SiO2, polycrystalline silicon (polysilicon), and SiO2. The undoped polysilicon in the CBL acted as a dielectric with a higher thermal conductivity than SiO2. CBL provides a reduced thermal resistance with the same equivalent oxide thickness as a standard SiO2 buried layer. Thermal resistance was further reduced by lateral heat flow through the polysilicon. Reduction in thermal resistance by up to 68% was observed, dependent on polysilicon thickness. CBL SOI substrates were designed and manufactured to achieve a 40% reduction in thermal resistance compared with an 1.0-μm SiO2 BOX. Power bipolar transistors with an active silicon layer thickness of 13.5 μm manufactured on CBL SOI substrates showed a 5%-17% reduction in thermal resistance compared with the standard SOI. This reduction was dependent on transistor layout geometry. Between 65% and 90% of the heat flow from these power transistors is laterally through the thick active silicon layer. Analysis confirmed that CBL SOI provided a 40% reduction in the vertical path thermal resistance. Devices employing thinner active silicon layers will achieve the greater benefit from reduction in vertical path thermal resistance offered by CBL SOI.