Flexural Test on Recycled Polystyrene

In socio-environmental scenario increased the nature resources concern beyond products and subproducts reuse. Recycling is the approach for a material or energy reintroducing in productive system. This method allows the reduction of garbage volume dumped in environment, saving energy and decreasing the requirement of natural resources use. In general, the ending of expanded polystyrene is deposited sanitary landfills or garbage dumps without control that take large volume and spreads easily by aeolian action, with consequently environmental pollution, however, the recycling avoids their misuse and the obtainment from petroleum is reduced. This work recycled expanded polystyrene via merger and/or dissolution by solvents for the production of integrated circuits boards. The obtained material was characterized in flexural mode according to ASTM D 790 and results were compared with phenolite, traditionally used. Specimens fractures were observed by electronic microscopy scanning in order to establish patterns. Expanded Polyestirene recycled as well as phenolite were also thermo analyzed by TGA and DSC. The method using dissolution produced very brittle materials. The method using merger showed no voids formation nor increased the brittleness of the material. The recycled polystyrene presented a strength value significantly lower than that for the phenolite. (C) 2011 Published by Elsevier Ltd. Selection and peer-review under responsibility of ICM11

Sistema operacional e biblioteca de funções para plataformas MPSOC: um estudo de caso para simuladores de reservatórios

The increasingly request for processing power during last years has pushed integrated circuit industry to look for ways of providing even more processing power with less heat dissipation, power consumption, and chip area. This goal has been achieved increasing the circuit clock, but since there are physical limits of this approach a new solution emerged as the multiprocessor system on chip (MPSoC). This approach demands new tools and basic software infrastructure to take advantage of the inherent parallelism of these architectures. The oil exploration industry has one of its firsts activities the project decision on exploring oil fields, those decisions are aided by reservoir simulations demanding high processing power, the MPSoC may offer greater performance if its parallelism can be well used. This work presents a proposal of a micro-kernel operating system and auxiliary libraries aimed to the STORM MPSoC platform analyzing its influence on the problem of reservoir simulation

An analog implementation of radial basis neural networks (RBNN) using BiCMOS technology

This paper describes a analog implementation of radial basis neural networks (RBNN) in BiCMOS technology. The RBNN uses a gaussian function obtained through the characteristic of the bipolar differential pair. The gaussian parameters (gain, center and width) is changed with programmable current source. Results obtained with PSPICE software is showed.

Common architecture for discrete wavelet transform analysis and synthesis with sequential and constant processing elements

This paper adresses the problem on processing biological data such as cardiac beats, audio and ultrasonic range, calculating wavelet coefficients in real time, with processor clock running at frequency of present ASIC's and FPGA. The Paralell Filter Architecture for DWT has been improved, calculating wavelet coefficients in real time with hardware reduced to 60%. The new architecture, which also processes IDWT, is implemented with the Radix-2 or the Booth-Wallace Constant multipliers. Including series memory register banks, one integrated circuit Signal Analyzer, ultrasonic range, is presented.

Discrete wavelet transform signal analyzer

This paper addresses the problem of processing biological data, such as cardiac beats in the audio and ultrasonic range, and on calculating wavelet coefficients in real time, with the processor clock running at a frequency of present application-specified integrated circuits and field programmable gate array. The parallel filter architecture for discrete wavelet transform (DWT) has been improved, calculating the wavelet coefficients in real time with hardware reduced up to 60%. The new architecture, which also processes inverse DWT, is implemented with the Radix-2 or the Booth-Wallace constant multipliers. One integrated circuit signal analyzer in the ultrasonic range, including series memory register banks, is presented. © 2007 IEEE.

Profilometry of semiconductor components by two-colour holography with Bi12TiO20 crystals

We studied the shape measurement of semiconductor components by holography with photorefractive Bi12TiO20 crystal as holographic medium and two diode lasers emitting in the red region as light sources. By properly tuning and aligning the lasers a synthetic wavelength was generated and the resulting holographic image of the studied object appears modulated by cos2-contour fringes which correspond to the intersection of the object surface with planes of constant elevation. The position of such planes as a function of the illuminating beam angle and the tuning of the lasers was studied, as well as the fringe visibility. The fringe evaluation was performed by the four stepping technique for phase mapping and through the branch-cut method for phase unwrapping. A damage in an integrated circuit was analysed as well as the relief of a coin was measured, and a precision up to 10 μm was estimated. © 2009 SPIE.

Um sistema eletrônico de 2kW para emulação/simulação experimental da característica estática de saída, tensão (versus) corrente, de sistemas de geração com células combustível tipo PEM

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Célula de comutação de três estados aplicada ao pré-regulador boost de estágio único e elevado fator de potência

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Pré-regulador retificador boost com controle digital por valores médios, para sistema de iluminação fluorescente multi-lâmpadas, utilizando dispositivo FPGA e VHDL

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Sintetizador analógico de sinais ortogonais: projeto e construção usando tecnologia CMOS

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Desenvolvimento de um sintetizador de freqüência de baixo custo em tecnologia CMOS

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Análise e síntese de um processador digital wavelet

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Modelagem IEEE 1815 DNP3 em VHDL e análise de comunicação SG via IEEE 802.15.4 e IEEE 802.11

Pós-graduação em Engenharia Elétrica - FEIS

Controlador PID utilizando microcontrolador PIC

This monograph proposes the implementation of a low cost PID controller utilizing a PIC microcontroller, and its application in a positioning system previously controlled by a dedicated integrated circuit for a positioning system. Applying the closed-loop PID control, the system instability was reduced, and its response was smoother, eliminating vibrations and mechanical wear compared to its response with the dedicated integrated circuit, which has a very limited control action. The actuator of the system is a DC motor, whose speed is controlled by the Pulse Width Modulation (PWM) technique, using a Full-Bridge circuit, allowing the shift of direction of rotation. The utilized microcontroller was the PIC16F684, which has an enhanced PWM module, with its analog converters used as reference and position feedback. The positioning sensor is a multiturn potentiometer coupled to the motor axis by gears. The possibility of programming the PID coefficients in the microcontroller, as well as the adjustment of the sampling rate, allows the implemented system achieving high level of versatility

Simulação em tempo real de sistemas de distribuição de energia elétrica utilizando-se estruturas com descrição de hardware em software

Pós-graduação em Engenharia Elétrica - FEIS