Energy-efficient redundant execution for chip multiprocessors

Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chip fault tolerance in future chip microprocessors (CMPs). In this paper, we describe a power-efficient architecture for redundant execution on chip multiprocessors (CMPs) which when coupled with our per-core dynamic voltage and frequency scaling (DVFS) algorithm significantly reduces the energy overhead of redundant execution without sacrificing performance. Our evaluation shows that this architecture has a performance overhead of only 0.3% and consumes only 1.48 times the energy of a non-fault-tolerant baseline.

Rollover-Preventive Force Synthesis at Active Suspensions in a Vehicle Performing a Severe Maneuver With Wheels Lifted Off

Among the intelligent safety technologies for road vehicles, active suspensions controlled by embedded computing elements for preventing rollover have received a lot of attention. The existing models for synthesizing and allocating forces in such suspensions are conservatively based on the constraints that are valid until no wheels lift off the ground. However, the fault tolerance of the rollover-preventive systems can be enhanced if the smart/active suspensions can intervene in the more severe situation in which the wheels have just lifted off the ground. The difficulty in computing control in the last situation is that the vehicle dynamics then passes into the regime that yields a model involving disjunctive constraints on the dynamics. Simulation of dynamics with disjunctive constraints in this context becomes necessary to estimate, synthesize, and allocate the intended hardware realizable forces in an active suspension. In this paper, we give an algorithm for the previously mentioned problem by solving it as a disjunctive dynamic optimization problem. Based on this, we synthesize and allocate the roll-stabilizing time-dependent active suspension forces in terms of sensor output data. We show that the forces obtained from disjunctive dynamics are comparable with existing force allocations and, hence, are possibly realizable in the existing hardware framework toward enhancing the safety and fault tolerance.

An Advanced Gate Driver for Insulated Gate Bipolar Transistors to Eliminate Dead-time Induced Distortions in Inverter Output

Dead-time is introduced between the gating signals to the top and bottom switches in a voltage source inverter (VSI) leg, to prevent shoot through fault due to the finite turn-off times of IGBTs. The dead-time results in a delay when the incoming device is an IGBT, resulting in error voltage pulses in the inverter output voltage. This paper presents the design, fabrication and testing of an advanced gate driver, which eliminates dead-time and consequent output distortion. Here, the gating pulses are generated such that the incoming IGBT transition is not delayed and shoot-through is also prevented. The various logic units of the driver card and fault tolerance of the driver are verified through extensive tests on different topologies such as chopper, half-bridge and full-bridge inverter, and also at different conditions of load. Experimental results demonstrate the improvement in the load current waveform quality with the proposed circuit, on account of elimination of dead-time.

Load Balancing with Availability Checker and Load Reporters (LB-ACLRs) for improved Performance in Distributed Systems

Distributed system has quite a lot of servers to attain increased availability of service and for fault tolerance. Balancing the load among these servers is an important task to achieve better performance. There are various hardware and software based load balancing solutions available. However there is always an overhead on Servers and the Load Balancer while communicating with each other and sharing their availability and the current load status information. Load balancer is always busy in listening to clients' request and redirecting them. It also needs to collect the servers' availability status frequently, to keep itself up-to-date. Servers are busy in not only providing service to clients but also sharing their current load information with load balancing algorithms. In this paper we have proposed and discussed the concept and system model for software based load balancer along with Availability-Checker and Load Reporters (LB-ACLRs) which reduces the overhead on server and the load balancer. We have also described the architectural components with their roles and responsibilities. We have presented a detailed analysis to show how our proposed Availability Checker significantly increases the performance of the system.

Quantum error correction with biased noise

Quantum computing offers powerful new techniques for speeding up the calculation of many classically intractable problems. Quantum algorithms can allow for the efficient simulation of physical systems, with applications to basic research, chemical modeling, and drug discovery; other algorithms have important implications for cryptography and internet security.

At the same time, building a quantum computer is a daunting task, requiring the coherent manipulation of systems with many quantum degrees of freedom while preventing environmental noise from interacting too strongly with the system. Fortunately, we know that, under reasonable assumptions, we can use the techniques of quantum error correction and fault tolerance to achieve an arbitrary reduction in the noise level.

In this thesis, we look at how additional information about the structure of noise, or "noise bias," can improve or alter the performance of techniques in quantum error correction and fault tolerance. In Chapter 2, we explore the possibility of designing certain quantum gates to be extremely robust with respect to errors in their operation. This naturally leads to structured noise where certain gates can be implemented in a protected manner, allowing the user to focus their protection on the noisier unprotected operations.

In Chapter 3, we examine how to tailor error-correcting codes and fault-tolerant quantum circuits in the presence of dephasing biased noise, where dephasing errors are far more common than bit-flip errors. By using an appropriately asymmetric code, we demonstrate the ability to improve the amount of error reduction and decrease the physical resources required for error correction.

In Chapter 4, we analyze a variety of protocols for distilling magic states, which enable universal quantum computation, in the presence of faulty Clifford operations. Here again there is a hierarchy of noise levels, with a fixed error rate for faulty gates, and a second rate for errors in the distilled states which decreases as the states are distilled to better quality. The interplay of of these different rates sets limits on the achievable distillation and how quickly states converge to that limit.

Contributions to High-Throughput Computing Based on the Peer-to-Peer Paradigm

XII, 116 p.

Contributions on agreement in dynamic distributed systems

139 p.

Agrupamento espacial em robótica de enxame.

Os Sistemas Multi-Robôs proporcionam vantagens sobre um robô individual, quando da realização de uma tarefa com maiores velocidade, precisão e tolerância a falhas. Os estudos dos comportamentos sociais na natureza têm permitido desenvolver algoritmos bio-inspirados úteis na área da robótica de enxame. Seguindo instruções simples e repetitivas, grupos de robôs, fisicamente limitados, conseguem solucionar problemas complexos. Quando existem duas ou mais tarefas a serem realizadas e o conjunto de robôs é heterogêneo, é possível agrupá-los de acordo com as funcionalidades neles disponíveis. No caso em que o conjunto de robôs é homogêneo, o agrupamento pode ser realizado considerando a posição relativa do robô em relação a uma tarefa ou acrescentando alguma característica distintiva. Nesta dissertação, é proposta uma técnica de clusterização espacial baseada simplesmente na comunicação local de robôs. Por meio de troca de mensagens entre os robôs vizinhos, esta técnica permite formar grupos de robôs espacialmente próximos sem precisar movimentar os robôs. Baseando-se nos métodos de clusterização de fichas, a técnica proposta emprega a noção de fichas virtuais, que são chamadas de cargas, sendo que uma carga pode ser estática ou dinâmica. Se uma carga é estática permite determinar a classe à qual um robô pertence. Dependendo da quantidade e do peso das cargas disponíveis no sistema, os robôs intercambiam informações até alcançar uma disposição homogênea de cargas. Quando as cargas se tornam estacionárias, é calculada uma densidade que permite guiar aquelas que estão ainda em movimento. Durante as experiências, foi observado visualmente que as cargas com maior peso acabam se agrupando primeiro enquanto aquelas com menor peso continuam se deslocando no enxame, até que estas cargas formem faixas de densidades diferenciadas para cada classe, alcançando assim o objetivo final que é a clusterização dos robôs.

gcs-ma: a group communication system for mobile agents

Reliable messaging is a key component necessary for mobile agent systems. Current researches focus on reliable one-to-one message delivery to mobile agents. But how to implement a group communication system for mobile agents remains an open issue, which is a powerful block that facilitates the development of fault-tolerant mobile agent systems. In this paper, we propose a group communication system for mobile agents (GCS-MA), which includes totally ordered multicast and membership management functions. We divide a group of mobile agents into several agent clusters,and each agent cluster consists of all mobile agents residing in the same sub-network and is managed by a special module, named coordinator. Then, all coordinators form a ring-based overlay for interchanging messages between clusters. We present a token-based algorithm, an intra-cluster messaging algorithm and an inter-cluster migration algorithm to achieve atomicity and total ordering properties of multicast messages, by building a membership protocol on top of the clustering and failure detection mechanisms. Performance issues of the proposed system have been analysed through simulations. We also describe the application of the proposed system in the context of the service cooperation middleware (SCM) project.

基于编译器的瞬时故障容错技术研究与实现

随着计算机芯片的速度不断提升，器件的门限电压越来越低，因此单粒子翻转的瞬时故障越来越容易发生。特别是在太空环境中的计算机系统，在宇宙射线的影响下，瞬时故障更为频繁，系统可靠性面临更突出的考验。 为了提高计算机系统的可靠性，一般有硬件冗余容错和软件冗余容错两种方法。相对硬件容错而言，软件容错的优点是价格便宜，性价比高，配置灵活等，缺点是会带来额外的时间和空间开销，而且给程序员带来编写额外的容错代码的工作量。近来出现了一些基于编译的软件容错方法，可在编译的过程中自动加入冗余容错逻辑，但是这类编译容错方法仍然会带来显著的时间空间开销。如何在保持容错能力的同时尽量降低时空开销，是有待继续研究的问题。 本文在编译容错方向上进行了进一步研究和实现，提出利用源代码中的变量信息对冗余容错逻辑进行了剪裁，在保证容错能力的同时降低了时空开销，对内存和寄存器中的数据进行保护。具体内容有： 1. 提出了一个容错编译环境SCC的设计蓝图，构建了一个容错编译工具的远 景目标。 2. 提出了一种指令级的编译容错检测方法VarBIFT ，提供检测瞬时故障的能力。平均只利用0.0069倍的时间损耗和0.3620倍的空间损耗就将发生瞬时故障时，程序正确执行和检测到故障的概率总和平均从39.1%提升到76.9%， 3. 提出了一种指令级的编译容错恢复方法VarRIFT ，提供从瞬时故障中恢复正确数据的能力。平均只增加0.043倍的时间损耗和0.69倍的空间损耗就将发生瞬时故障时，程序仍然正确执行的概率平均从44.8%提升到了78.7%。 4. 基于开源编译器LCC，实现了上述两个编译容错方法VarBIFT 和VarRIFT 。在容错方法的实现中只修改了跟具体CPU指令相独立的中间逻辑，所以这两个实现能够方便得移植到SPARC、MIPS等其他CPU架构上。 5. 开发了一个故障注入工具，并用它测试了上述两个编译容错方法VarBIFT和VarRIFT 的容错能力。

VarBIFT:指令级的变量冗余容错检测技术

为了解决空间辐射对嵌入式计算机系统正确性的影响越来越明显的问题,基于典型的编译级容错技术,在编译器LCC上实现了基于有向无环图的编译级容错检测方法VarBIFT。该方法可以有效的保护由于粒子效应所引起的瞬时硬件故障,并可针对不同的目标机自动生成容错代码。实验结果表明,VarBIFT使源程序的平均段错误率从32.3%降到了13.9%,平均错误输出率从28.6%降到了9.2%;而其时间开销和空间开销仅为0.7%和36%。

指令级的变量容错恢复

提出一种抵抗瞬时故障的自动编译容错恢复方法,用源码中的变量信息在指令级别进行冗余错误流裁剪,在LCC上加以实现,并获得良好的容错性能。实验结果表明,该方法仅增加0.043倍的时间损耗及0.69倍的空间损耗,在时空损耗上优于现有的其他方法。

集群技术在电力综合自动化系统中的应用研究

介绍了一种利用集群技术实现双机容错的开发方法.通过对集群技术运行机制的深入研究,提出了采用基于"层"模式的双机容错系统技术方案,在普通PC服务器上实现了双机容错系统,分析了该系统的可用性,针对电力综合自动系统的结构特点,对心跳侦测等功能进行了改进,并在一套小型变电站自动化系统上进行了实验验证,能够较好的满足中小型电力综合自动化系统的需求.

基于信道估计的RS纠错编码改进算法的设计与实现

提出了一种基于信道估计的RS纠错编码改进算法,该算法可以自适应地根据外界条件和环境对传输信道的干扰变化实时地调节编码系统的数据冗余量。仿真与完整的分析结果证实了该改进算法有效地改善了RS编码算法的传输效率;并且通过实际应用表明:良好的性能,高容错性适应于该通信系统的多种传输信道,具有很强的实用性。

AUV内部通讯总线设计

设计了基于CAN协议的AUV内部通讯总线系统 .系统通过协议转换器的模块化、可配置性设计满足AUV系统对其内部通讯总线的开放性要求 .协议转换器内部的容错处理能力以及紧急事件处理节点的设计为增强AUV系统的可靠性和容错能力、为避免AUV在深海工作环境下丢失增加有力的保障措施