922 resultados para Core Bereavement


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O processo de envelhecimento está associado a alterações ao nível da força muscular e do equilíbrio, entre outras. A investigação recente evidenciou a importância da força e estabilidade dos músculos do core para as atividades da vida diária (AVD) em idosos, contribuindo para manter a estabilidade durante a realização dessas atividades. Sendo a funcionalidade e a independência nas AVD a finalidade da fisioterapia, nomeadamente através do aumento da estabilidade postural, parece importante estudar os efeitos da sua intervenção baseada em programas de treino dos músculos do core. Objetivo do estudo - Avaliar o efeito de um programa de exercícios direcionado para os músculos do core no aumento do equilíbrio em idosos.

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Sera from 299 fishermen 16 to 80 years old, residents in Cananeia and Iguape counties, southern cost of São Paulo State, Brazil, were studied in order to identify a possible association between the prevalence of specific antibodies to the hepatitis B virus (HBV) and exposure to haematophagus mosquitoes evaluated by the prevalence of arbovirus antibodies. This professional group presented the highest prevalence of arbovirus antibodies (54.1%) in past investigations carried out in this heavily forested region. Detection of antibody to hepatitis B core antigen (anti-HBc) in the sera was done by enzyme immunoassay (Roche). Prevalence of anti-HBc antibodies in this group was 31.4% (94/299) which is very high compared with 7.2% to 15.0% for different groups of healthy adults in State of São Paulo. No significant difference is observed between the prevalences of HBV antibodies in Iguape and Cananeia. Prevalence of anti-HBc and anti-arbovirus antibodies increases with age. There is a concordance in the distribution according to age groups of the frequency of anti-HBc and anti-arbovirus positive sera. Ag HBs was detected in 4% of the studied sera. These results support the hypothesis that the transmission of the hepatitis B virus and the arboviruses may be due to the same factor, one of the possibilities would be by anthropophilic mosquitoes.

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The design of magnetic cores can be carried out by taking into account the optimization of different parameters in accordance with the application requirements. Considering the specifications of the fast field cycling nuclear magnetic resonance (FFC-NMR) technique, the magnetic flux density distribution, at the sample insertion volume, is one of the core parameters that needs to be evaluated. Recently, it has been shown that the FFC-NMR magnets can be built on the basis of solenoid coils with ferromagnetic cores. Since this type of apparatus requires magnets with high magnetic flux density uniformity, a new type of magnet using a ferromagnetic core, copper coils, and superconducting blocks was designed with improved magnetic flux density distribution. In this paper, the designing aspects of the magnet are described and discussed with emphasis on the improvement of the magnetic flux density homogeneity (Delta B/B-0) in the air gap. The magnetic flux density distribution is analyzed based on 3-D simulations and NMR experimental results.

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Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.

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Sandwich structures with soft cores are widely used in applications where a high bending stiffness is required without compromising the global weight of the structure, as well as in situations where good thermal and damping properties are important parameters to observe. As equivalent single layer approaches are not the more adequate to describe realistically the kinematics and the stresses distributions as well as the dynamic behaviour of this type of sandwiches, where shear deformations and the extensibility of the core can be very significant, layerwise models may provide better solutions. Additionally and in connection with this multilayer approach, the selection of different shear deformation theories according to the nature of the material that constitutes the core and the outer skins can predict more accurately the sandwich behaviour. In the present work the authors consider the use of different shear deformation theories to formulate different layerwise models, implemented through kriging-based finite elements. The viscoelastic material behaviour, associated to the sandwich core, is modelled using the complex approach and the dynamic problem is solved in the frequency domain. The outer elastic layers considered in this work may also be made from different nanocomposites. The performance of the models developed is illustrated through a set of test cases. (C) 2015 Elsevier Ltd. All rights reserved.

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Two groups of patients undergoing hemodialysis (HD) maintenance were evaluated for their antibody response to non-structural c100/3 protein and structural core protein of hepatitis C virus (HCV). Forty-six patients (Group 1) never presented liver abnormalities during HD treatment, while 52 patients (Group 2) had either current or prior liver enzyme elevations. Prevalence rates of 32.6% and 41.3% were found for anti-c100/3 and anti-HCV core antibodies, respectively, in patients with silent infections (Group 1). The rate of anti-c100/3 in patients of Group 2 was 71.15% and reached 86.5% for anti-HCV core antibodies. The recognition of anti-c100/3 and anti-core antibodies was significantly higher in Group 2 than in Group 1. A line immunoassay composed of structural and non-structural peptides was used as a confirmation assay. HBV infection, measured by the presence of anti-HBc antibodies, was observed in 39.8% of the patients. Six were HBsAg chronic carriers and 13 had naturally acquired anti-HBs antibodies. The duration of HD treatment was correlated with anti-HCV positivity. A high prevalence of 96.7% (Group 2) was found in patients who underwent more than 5 years of treatment. Our results suggest that anti-HCV core ELISA is more accurate for detecting HCV infection than anti-c100/3. Although the risk associated with the duration of HD treatment and blood transfusion was high, additional factors such as a significant non-transfusional spread of HCV seems to play a role as well. The identification of infective patients by more sensitive methods for HCV genome detection should help to control the transmission of HCV in the unit under study.

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Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.

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Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix. This sparsity of data locality reduces the effectiveness of data cache in general-purpose processors quite reducing their performance efficiency when compared to what is achieved with dense matrix multiplication. In this paper, we propose a parallel processing solution for SMVM in a many-core architecture. The architecture is tested with known benchmarks using a ZYNQ-7020 FPGA. The architecture is scalable in the number of core elements and limited only by the available memory bandwidth. It achieves performance efficiencies up to almost 70% and better performances than previous FPGA designs.

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Trabalho apresentado no âmbito do Mestrado em Engenharia Informática, como requisito parcial para obtenção do grau de Mestre em Engenharia Informática

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The clinical significance of isolated anti-HBc is still a challenge. To elucidate the real importance of this finding in our blood donors, an investigation algorithm was tested. One hundred and twelve isolated anti-HBc seropositive blood donors underwent clinical evaluation and retesting of HBV markers. Those who presented repeatedly reactive isolated anti-HBc, received a single dose of hepatitis B recombinant vaccine to verify anti-HBs early response. A HBV-DNA determination by PCR was done for those who did not test positive to anti-HBs after vaccine. The level of anti-HBc was recorded as a ratio of the sample-to-cut-off values (S:C ratio) in 57 candidates at donation. Comparing true and false-positive anti-HBc results, the different S:C ratios of them were statistically significant and when less than 2, implying in a false-positive result probability over 80%. A high percent of false-positive results (16.07%) was verified after anti-HBc retesting. HBV immunity was characterized in 49.11%, either by anti-HBs detection in retesting (15.18%), or after a single dose HBV vaccination (33.93%). HBV-DNA was negative in all tested donors. In conclusion, this algorithm was useful to clarify the meaning of isolated anti-HBc in most of our blood donors.

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The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.

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As of today, AUTOSAR is the de facto standard in the automotive industry, providing a common software architec- ture and development process for automotive applications. While this standard is originally written for singlecore operated Elec- tronic Control Units (ECU), new guidelines and recommendations have been added recently to provide support for multicore archi- tectures. This update came as a response to the steady increase of the number and complexity of the software functions embedded in modern vehicles, which call for the computing power of multicore execution environments. In this paper, we enumerate and analyze the design options and the challenges of porting AUTOSAR-based automotive applications onto multicore platforms. In particular, we investigate those options when considering the emerging many- core architectures that provide a more scalable environment than the traditional multicore systems. Such platforms are suitable to enable massive parallel execution, and their design is more suitable for partitioning and isolating the software components.

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Euromicro Conference on Digital System Design (DSD 2015), Funchal, Portugal.

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6th International Real-Time Scheduling Open Problems Seminar (RTSOPS 2015), Lund, Sweden.

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Distributed real-time systems such as automotive applications are becoming larger and more complex, thus, requiring the use of more powerful hardware and software architectures. Furthermore, those distributed applications commonly have stringent real-time constraints. This implies that such applications would gain in flexibility if they were parallelized and distributed over the system. In this paper, we consider the problem of allocating fixed-priority fork-join Parallel/Distributed real-time tasks onto distributed multi-core nodes connected through a Flexible Time Triggered Switched Ethernet network. We analyze the system requirements and present a set of formulations based on a constraint programming approach. Constraint programming allows us to express the relations between variables in the form of constraints. Our approach is guaranteed to find a feasible solution, if one exists, in contrast to other approaches based on heuristics. Furthermore, approaches based on constraint programming have shown to obtain solutions for these type of formulations in reasonable time.