Image processing chip for small object detection

A new, front-end image processing chip is presented for real-time small object detection. It has been implemented using a 0.6 µ, 3.3 V CMOS technology and operates on 10-bit input data at 54 megasamples per second. It occupies an area of 12.9 mm×13.6 mm (including pads), dissipates 1.5 W, has 92 I/O pins and is to be housed in a 160-pin ceramic quarter flat-pack. It performs both one- and two-dimensional FIR filtering and a multilayer perceptron (MLP) neural network function using a reconfigurable array of 21 multiplication-accumulation cells which corresponds to a window size of 7×3. The chip can cope with images of 2047 pixels per line and can be cascaded to cope with larger window sizes. The chip performs two billion fixed point multiplications and additions per second.

JPEG encoder system-on-a-chip demonstrator

The design of a System-on-a-Chip (SoC) demonstrator for a baseline JPEG encoder core is presented. This combines a highly optimized Discrete Cosine Transform (DCT) and quantization unit with an entropy coder which has been realized using off-the-shelf synthesizable IP cores (Run-length coder, Huffman coder and data packer). When synthesized in a 0.35 µm CMOS process, the core can operate at speeds up to 100 MHz and contains 50 k gates plus 11.5 kbits of RAM. This is approximately 20% less than similar JPEG encoder designs reported in literature. When targeted at FPGA the core can operate up to 30 MHz and is capable of compressing 9-bit full-frame color input data at NTSC or PAL rates.

Programmable image processing chip

A new high performance, programmable image processing chip targeted at video and HDTV applications is described. This was initially developed for image small object recognition but has much broader functional application including 1D and 2D FIR filtering as well as neural network computation. The core of the circuit is made up of an array of twenty one multiplication-accumulation cells based on systolic architecture. Devices can be cascaded to increase the order of the filter both vertically and horizontally. The chip has been fabricated in a 0.6 µ, low power CMOS technology and operates on 10 bit input data at over 54 Megasamples per second. The introduction gives some background to the chip design and highlights that there are few other comparable devices. Section 2 gives a brief introduction to small object detection. The chip architecture and the chip design will be described in detail in the later sections.

New FFT architecture and chip design for motion compensation based on phase correlation

Details of a new low power FFT processor for use in digital television applications are presented. This has been fabricated using a 0.6 µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-rime video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8×8 mm and dissipates 1 W. Its performance, in terms of computational rate per area per watt, is significantly higher than previously reported devices, leading to a cost-effective silicon solution for high quality video processing applications. This is the result of using a novel VLSI architecture which has been derived from a first principles factorisation of the DFT matrix and tailored to a direct silicon implementation.

Influence of a pore-forming agent on swelling, network parameters, and permeability of poly(ethylene glycol)-crosslinked poly(methyl vinyl ether-co-maleic acid) hydrogels:Application in transdermal delivery systems

We characterized hydrogels, prepared from aqueous blends of poly(methyl vinyl ether-co-maleic acid) (PMVE/MA) and poly(ethylene glycol) (PEG 10,000 Daltons) containing a pore-forming agent (sodium bicarbonate, NaHCO ). Increase in NaHCO content increased the equilibrium water content (EWC) and average molecular weight between crosslinks (M ) of hydrogels. For example, the %EWC was 731, 860, 1109, and 7536% and the M was 8.26, 31.64, 30.04, and 3010.00 × 10 g/mol for hydrogels prepared from aqueous blends containing 0, 1, 2, and 5% w/w of NaHCO , respectively. Increase in NaHCO content also resulted in increased permeation of insulin. After 24 h, percentage permeation was 0.94, 3.68, and 25.71% across hydrogel membranes prepared from aqueous blends containing 0, 2, and 5% w/w of NaHCO , respectively. Hydrogels containing the pore-forming agent were fabricated into microneedles (MNs) for transdermal drug delivery applications by integrating the MNs with insulin-loaded patches. It was observed that the mean amount of insulin permeating across neonatal porcine skin in vitro was 20.62% and 52.48% from hydrogel MNs prepared from aqueous blends containing 0 and 5% w/w of NaHCO . We believe that these pore-forming hydrogels are likely to prove extremely useful for applications in transdermal drug delivery of biomolecules. © 2012 Wiley Periodicals, Inc.

Guideline on the design and conduct of cystic fibrosis clinical trials: The European Cystic Fibrosis Society–Clinical Trials Network (ECFS-CTN)

We describe the rationale for disease specific research networks in general as well as the aims and function of the European Cystic Fibrosis Society-Clinical Trials Network (ECFS-CTN) specifically. The ECFS-CTN was founded in 2009 with the aim of improving the quality and quantity of clinical research in the area of cystic fibrosis (CF) in Europe. A network of 18 clinical trial sites in 8 European countries was established according to uniform state-of-the-art quality criteria. To support the ECFS-CTN in the acquisition, planning and conduct of clinical trials, the network is equipped with a coordinating centre, steering and executive committees, and committees for protocol review, standardization, training and networking as well as a data safety monitoring board. A strong partnership with European CF patient parent organizations aims to increase awareness of the need for efficient clinical research and the participation of patients in clinical trials.

Assessment of a multiplexing high throughput immunochemical SPR biosensor in measuring multiple proteins on a single biosensor chip

Multiplexed immunochemical detection platforms offer the potential to decrease labour demands, increase sample throughput and decrease overall time to result. A prototype four channel multiplexed high throughput surface plasmon resonance biosensor was previously developed, for the detection of food related contaminants. A study focused on determining the instruments performance characteristics was undertaken. This was followed by the development of a multiplexed assay for four high molecular weight proteins. The protein levels were simultaneously evaluated in serum samples of 10-week-old veal calves (n = 24) using multiple sample preparation methods. Each of the biosensor's four channels were shown to be independent of one another and produced multiplexed within run repeatability (n = 6) ranging from 2.0 to 6.7%CV, for the four tested proteins, whilst between run reproducibility (n = 4) ranged from 1.5 to 8.9%CV. Four calibration curves were successfully constructed before serum sample preparation was optimised for each protein. Multiplexed concentration analysis was successfully performed on four channels revealing that each proteins concentration was consistent across the twenty-four tested animals. Signal reproducibility (n > 19) on a further long term study revealed coefficient of variation ranging from 1.1% to 7.3% and showed that the multiplexed assay was stable for at least 480 cycles. These findings indicate that the performance characteristics fall within the range of previously published data for singleplex optical biosensors and that the multiplexing biosensor is fit-for-purpose for simultaneous concentration analysis in many different types of applications such as the multiplexed detection of markers of growth-promoter abuse and multiplexed detection of residues of concern in food safety. © 2013 Elsevier B.V.

Synchronized phasor measurement on the All-Ireland electrical network

Variations in the phase angle difference between a remote 11kV connected wind farm and the centre of Belfast during a typical working day are investigated in the paper. The results obtained using phasor measurement units (PMUs) are compared with the data generated using a PSS/E simulator configured to model the N.Ireland network. The study investigates the effect of changes in the load demand and the wind farm output power on the phase angles at various locations on the network. The paper finally describes how a major system disturbance on the All-Ireland network was monitored and analysed using PMUs located at Queen's University, Belfast and University College Dublin. ©2007 IEEE.

Fault Location on a Distribution Network Using a Decentralised Analysis Process

A reduction in the time required to locate and restore faults on a utility's distribution network improves the customer minutes lost (CML) measurement and hence brings direct cost savings to the operating company. The traditional approach to fault location involves fault impedance determination from high volume waveform files dispatched across a communications channel to a central location for processing and analysis. This paper examines an alternative scheme where data processing is undertaken locally within a recording instrument thus reducing the volume of data to be transmitted. Processed event fault reports may be emailed to relevant operational staff for the timely repair and restoration of the line.