New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise

IEEE International Symposium on Circuits and Systems, pp. 232 – 235, Seattle, EUA

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC

IEEE International Symposium on Circuits and Systems, pp. 220 – 223, Seattle, EUA

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback

IEEE International Symposium on Circuits and Systems, pp. 2258 – 2261, Seattle, EUA

A CMOS variable width short-pulse generator circuit for UWB RADAR applications

IEEE International Symposium on Circuits and Systems, pp. 2713 – 2716, Seattle, EUA

Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm

IEEE International Symposium on Circuits and Systems, pp. 724 – 727, Seattle, EUA

New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification

15th IEEE International Conference on Electronics, Circuits and Systems, Malta

Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids

15th IEEE International Conference on Electronics, Circuits and Systems, Malta

Design and testing of a radiation hardened 13-bit 80 MS/s pipeline ADC implemented in a 90nm standard CMOS process

Second International Workshop on Analog and Mixed Signal Integrated Circuits for Space Applications (AMICSA 2008), Sintra, Portugal, Setembro de 2008

Digitally programmable delay-locked-loop with adaptive charge pump current for UWB radar system

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica e Computadores

ALS-Sence: sistema de aquisição e processamento de electromiogramas para pacientes com ALS

Dissertação para obtenção do grau de Mestre em Engenharia de Eletrónica e Computadores

Drawing and use of auxiliary projection nets (the program STEGRAPH)

The development of an algorithm for the construction of auxiliary projection nets (conform, equivalent and orthographic), in the equatorial and polar versions, is presented. The algorithm for the drawing of the "IGAREA 220" counting net (ALYES & MENDES, 1972), is also presented. Those algorithms are the base of STEGRAPH program (vers. 2.0), for MS-DOS computers, which has other applications.

Contagem de pontos em projecção triangular A rede de contagem TRIREDE

The TRIREDE triangular counting net is presented, as well as the algorithm for its calculation and the TRIREDE program, used to project points in a triangular net and the calculation of a density grid.

Comando e proteção de IGBTs em paralelo

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial

Controlo de conversores de potência genéricos por FPGA

Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial

Inferência de percursos dos utentes de um transporte coletivo

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Redes de Comunicações e Multimédia