On optimizing micropower MOS regulated cascode circuits on switched current techniques

Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.

Investigation of Bulk and DTMOS triple-gate devices under 60 MeV proton irradiation

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Mixed-domain simulation and hybrid wafer-level packaging of RF-MEMS devices for wireless applications

In questa tesi verranno trattati sia il problema della creazione di un ambiente di simulazione a domini fisici misti per dispositivi RF-MEMS, che la definizione di un processo di fabbricazione ad-hoc per il packaging e l’integrazione degli stessi. Riguardo al primo argomento, sarà mostrato nel dettaglio lo sviluppo di una libreria di modelli MEMS all’interno dell’ambiente di simulazione per circuiti integrati Cadence c . L’approccio scelto per la definizione del comportamento elettromeccanico dei MEMS è basato sul concetto di modellazione compatta (compact modeling). Questo significa che il comportamento fisico di ogni componente elementare della libreria è descritto per mezzo di un insieme limitato di punti (nodi) di interconnessione verso il mondo esterno. La libreria comprende componenti elementari, come travi flessibili, piatti rigidi sospesi e punti di ancoraggio, la cui opportuna interconnessione porta alla realizzazione di interi dispositivi (come interruttori e capacità variabili) da simulare in Cadence c . Tutti i modelli MEMS sono implementati per mezzo del linguaggio VerilogA c di tipo HDL (Hardware Description Language) che è supportato dal simulatore circuitale Spectre c . Sia il linguaggio VerilogA c che il simulatore Spectre c sono disponibili in ambiente Cadence c . L’ambiente di simulazione multidominio (ovvero elettromeccanico) così ottenuto permette di interfacciare i dispositivi MEMS con le librerie di componenti CMOS standard e di conseguenza la simulazione di blocchi funzionali misti RF-MEMS/CMOS. Come esempio, un VCO (Voltage Controlled Oscillator) in cui l’LC-tank è realizzato in tecnologia MEMS mentre la parte attiva con transistor MOS di libreria sarà simulato in Spectre c . Inoltre, nelle pagine successive verrà mostrata una soluzione tecnologica per la fabbricazione di un substrato protettivo (package) da applicare a dispositivi RF-MEMS basata su vie di interconnessione elettrica attraverso un wafer di Silicio. La soluzione di packaging prescelta rende possibili alcune tecniche per l’integrazione ibrida delle parti RF-MEMS e CMOS (hybrid packaging). Verranno inoltre messe in luce questioni riguardanti gli effetti parassiti (accoppiamenti capacitivi ed induttivi) introdotti dal package che influenzano le prestazioni RF dei dispositivi MEMS incapsulati. Nel dettaglio, tutti i gradi di libertà del processo tecnologico per l’ottenimento del package saranno ottimizzati per mezzo di un simulatore elettromagnetico (Ansoft HFSSTM) al fine di ridurre gli effetti parassiti introdotti dal substrato protettivo. Inoltre, risultati sperimentali raccolti da misure di strutture di test incapsulate verranno mostrati per validare, da un lato, il simulatore Ansoft HFSSTM e per dimostrate, dall’altro, la fattibilit`a della soluzione di packaging proposta. Aldilà dell’apparente debole legame tra i due argomenti sopra menzionati è possibile identificare un unico obiettivo. Da un lato questo è da ricercarsi nello sviluppo di un ambiente di simulazione unificato all’interno del quale il comportamento elettromeccanico dei dispositivi RF-MEMS possa essere studiato ed analizzato. All’interno di tale ambiente, l’influenza del package sul comportamento elettromagnetico degli RF-MEMS può essere tenuta in conto per mezzo di modelli a parametri concentrati (lumped elements) estratti da misure sperimentali e simulazioni agli Elementi Finiti (FEM) della parte di package. Infine, la possibilità offerta dall’ambiente Cadence c relativamente alla simulazione di dipositivi RF-MEMS interfacciati alla parte CMOS rende possibile l’analisi di blocchi funzionali ibridi RF-MEMS/CMOS completi.

Study of silicon-on-insulator multiple-gate MOS structures including band-gap engineering and self heating effects

The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizing of the MOSFET dimensions (scaling); however, new issues and new challenges are arising, and the conventional ”bulk” architecture is becoming inadequate in order to face them. In order to overcome the limitations related to conventional structures, the researchers community is preparing different solutions, that need to be assessed. Possible solutions currently under scrutiny are represented by: • devices incorporating materials with properties different from those of silicon, for the channel and the source/drain regions; • new architectures as Silicon–On–Insulator (SOI) transistors: the body thickness of Ultra-Thin-Body SOI devices is a new design parameter, and it permits to keep under control Short–Channel–Effects without adopting high doping level in the channel. Among the solutions proposed in order to overcome the difficulties related to scaling, we can highlight heterojunctions at the channel edge, obtained by adopting for the source/drain regions materials with band–gap different from that of the channel material. This solution allows to increase the injection velocity of the particles travelling from the source into the channel, and therefore increase the performance of the transistor in terms of provided drain current. The first part of this thesis work addresses the use of heterojunctions in SOI transistors: chapter 3 outlines the basics of the heterojunctions theory and the adoption of such approach in older technologies as the heterojunction–bipolar–transistors; moreover the modifications introduced in the Monte Carlo code in order to simulate conduction band discontinuities are described, and the simulations performed on unidimensional simplified structures in order to validate them as well. Chapter 4 presents the results obtained from the Monte Carlo simulations performed on double–gate SOI transistors featuring conduction band offsets between the source and drain regions and the channel. In particular, attention has been focused on the drain current and to internal quantities as inversion charge, potential energy and carrier velocities. Both graded and abrupt discontinuities have been considered. The scaling of devices dimensions and the adoption of innovative architectures have consequences on the power dissipation as well. In SOI technologies the channel is thermally insulated from the underlying substrate by a SiO2 buried–oxide layer; this SiO2 layer features a thermal conductivity that is two orders of magnitude lower than the silicon one, and it impedes the dissipation of the heat generated in the active region. Moreover, the thermal conductivity of thin semiconductor films is much lower than that of silicon bulk, due to phonon confinement and boundary scattering. All these aspects cause severe self–heating effects, that detrimentally impact the carrier mobility and therefore the saturation drive current for high–performance transistors; as a consequence, thermal device design is becoming a fundamental part of integrated circuit engineering. The second part of this thesis discusses the problem of self–heating in SOI transistors. Chapter 5 describes the causes of heat generation and dissipation in SOI devices, and it provides a brief overview on the methods that have been proposed in order to model these phenomena. In order to understand how this problem impacts the performance of different SOI architectures, three–dimensional electro–thermal simulations have been applied to the analysis of SHE in planar single and double–gate SOI transistors as well as FinFET, featuring the same isothermal electrical characteristics. In chapter 6 the same simulation approach is extensively employed to study the impact of SHE on the performance of a FinFET representative of the high–performance transistor of the 45 nm technology node. Its effects on the ON–current, the maximum temperatures reached inside the device and the thermal resistance associated to the device itself, as well as the dependence of SHE on the main geometrical parameters have been analyzed. Furthermore, the consequences on self–heating of technological solutions such as raised S/D extensions regions or reduction of fin height are explored as well. Finally, conclusions are drawn in chapter 7.

Temperature performance of AlGaN/GaN MOS-HEMTs on Si substrates using Gd2O3 as gate dielectric

GaN based high electron mobility transistors have draw great attention due to its potential in high temperature, high power and high frequency applications [1, 2]. However, significant gate leakage current is still one of the issues which need to be solved to improve the performance and reliability of the devices [3]. Several research groups have contributed to solve this problem by using metal–oxide–semiconductor HEMTs (MOSHEMTs), with a thin dielectric layer, such as SiO2 [4], Al2O3 [5], HfO2 [6] and Gd2O3 [7] between the gate and the barrier layer on AlGaN/GaN heterostructures. Gd2O3 has shown low interfacial density of states(Dit) with GaN and a high dielectric constant and low electrical leakage currents [8], thus is considered as a promising candidate for the gate dielectrics on GaN. MOS-HEMTs using Gd2O3 grown by electron-beam heating [7] or molecular beam epitaxy (MBE) [8] on GaN or AlGan/GaN structure have been investigated, but further research is still needed in Gd2O3 based AlGaN/GaN MOSHEMTs.

Thermal stability study of AlGaN/GaN MOS-HEMTs using Gd2O3 as gate dielectric

Thermal stability of AlGaN/GaN MOS-HEMTs and -diodes using Gd_(2)O_(3) are investigated by means of different thermal cycles and storage tests up to 500ºC for one week. IV DC and pulsed characteristics of the devices before and after the processes are evaluated and compared with conventional HEMTs. Results show that the devices with Gd_(2)O_(3) dielectric layer have lower leakage current and a more stable behavior during thermal treatment processes compared with conventional devices. In fact, an excellent on/off ratio of about 108 and a stable V_(t) is observed after storage at high temperature. The beneficial effects of Gd_(2)O_(3) on trapping effects of MOS-HEMTs are also dis-cussed.

Comparison of ultrafine particle release from hardcopy devices in emission test chambers and office rooms

The release of ultrafine particles (UFP) from laser printers and office equipment was analyzed using a particle counter (FMPS; Fast Mobility Particle Sizer) with a high time resolution, as well as the appropriate mathematical models. Measurements were carried out in a 1 m³ chamber, a 24 m³ chamber and an office. The time-dependent emission rates were calculated for these environments using a deconvolution model, after which the total amount of emitted particles was calculated. The total amounts of released particles were found to be independent of the environmental parameters and therefore, in principle, they were appropriate for the comparison of different printers. On the basis of the time-dependent emission rates, “initial burst” emitters and constant emitters could also be distinguished. In the case of an “initial burst” emitter, the comparison to other devices is generally affected by strong variations between individual measurements. When conducting exposure assessments for UFP in an office, the spatial distribution of the particles also had to be considered. In this work, the spatial distribution was predicted on a case by case basis, using CFD simulation.

Comparison of emission rate values for odour and odorous chemicals derived from two sampling devices

Field and laboratory measurements identified a complex relationship between odour emission rates provided by the US EPA dynamic emission chamber and the University of New South Wales wind tunnel. Using a range of model compounds in an aqueous odour source, we demonstrate that emission rates derived from the wind tunnel and flux chamber are a function of the solubility of the materials being emitted, the concentrations of the materials within the liquid; and the aerodynamic conditions within the device – either velocity in the wind tunnel, or flushing rate for the flux chamber. The ratio of wind tunnel to flux chamber odour emission rates (OU m-2 s) ranged from about 60:1 to 112:1. The emission rates of the model odorants varied from about 40:1 to over 600:1. These results may provide, for the first time, a basis for the development of a model allowing an odour emission rate derived from either device to be used for odour dispersion modelling.

Work at hand : an exploration of gesture in the context of work and everyday life to inform the design of gestural input devices

This research explores gestures used in the context of activities in the workplace and in everyday life in order to understand requirements and devise concepts for the design of gestural information applicances. A collaborative method of video interaction analysis devised to suit design explorations, the Video Card Game, was used to capture and analyse how gesture is used in the context of six different domains: the dentist's office; PDA and mobile phone use; the experimental biologist's laboratory; a city ferry service; a video cassette player repair shop; and a factory flowmeter assembly station. Findings are presented in the form of gestural themes, derived from the tradition of qualitative analysis but bearing some similarity to Alexandrian patterns. Implications for the design of gestural devices are discussed.

Biomechanical force displacement analysis of strength of fixation of tracker holding devices to bone in computer aided joint replacement

Computer aided joint replacement surgery has become very popular during recent years and is being done in increasing numbers all over the world. The accuracy of the system depends to a major extent, on accurate registration and immobility of the tracker attachment devices to the bone. This study was designed to asses the forces needed to displace the tracker attachment devices in the bone simulators. Bone simulators were used to maintain the uniformity of the bone structure during the study. The fixation devices tested were 3mm diameter self drilling, self tapping threaded pin, 4mm diameter self tapping cortical threaded pin, 5mm diameter self tapping cancellous threaded pin and a triplanar fixation device ‘ortholock’ used with three 3mm pins. All the devices were tested for pull out, translational and rotational forces in unicortical and bicortical fixation modes. Also tested was the normal bang strength and forces generated by leaning on the devices. The forces required to produce translation increased with the increasing diameter of the pins. These were 105N, 185N, and 225N for the unicortical fixations and 130N, 200N, 225N for the bicortical fixations for 3mm, 4mm and 5mm diameter pins respectively. The forces required to pull out the pins were 1475N, 1650N, 2050N for the unicortical, 1020N, 3044N and 3042N for the bicortical fixated 3mm, 4mm and 5mm diameter pins. The ortholock translational and pull out strength was tested to 900N and 920N respectively and still it did not fail. Rotatory forces required to displace the tracker on pins was to the magnitude of 30N before failure. The ortholock device had rotational forces applied up to 135N and still did not fail. The manual leaning forces and the sudden bang forces generated were of the magnitude of 210N and 150N respectively. The strength of the fixation pins increases with increasing diameter from three to five mm for the translational forces. There is no significant difference in pull out forces of four mm and five mm diameter pins though it is more that the three mm diameter pins. This is because of the failure of material at that stage rather than the fixation device. The rotatory forces required to displace the tracker are very small and much less that that can be produced by the surgeon or assistants in single pins. Although the ortholock device was tested to 135N in rotation without failing, one has to be very careful not to put any forces during the operation on the tracker devices to ensure the accuracy of the procedure.

Emotional experience with portable interactive devices

This paper reports on a six month longitudinal study exploring people’s personal and social emotional experience with Portable Interactive Devices (PIDs). The study is concerned with the experience design approach and based on the theoretical framework of Activity Theory. The focus is on emotional experiences and how artefacts mediate and potentially enhance this experience. The outcomes of the study identified interesting aspects of PID interaction. Findings revealed people interact with PIDs emotionally both at a personal and a social level, supporting previous studies. Further, the social level impacts significantly on the emotional experience attained. If negative social experiences exceeded negative personal experiences the emotional experience was constant over six months. If negative personal experiences surpassed negative social experiences the emotional experience was varied over six months. The findings are discussed in regards to their significance to the field of design, their implication for future PID design and future research directions.

Elderly people's use of and attitudes towards assistive devices

People in developed countries are living longer with the help of medical advances. Literature has shown that older people prefer to stay independent and live at home for as long as possible. Therefore, it is important to find out how to best accommodate and assist them in maintaining quality of life and independence as well as easing human resources. Researchers have claimed that assistive devices assist in older people’s independence, however, only a small number of studies regarding the efficiency of assistive devices have been undertaken of which several have stated that devices are not being used. The overall aim of this research was to identify whether the disuse and ineffectiveness of assistive devices are related to change in abilities or related to the design of the devices. The objective was to gather information from the elderly; to identify what assistive devices are being used or not used and to gain an understanding on their attitudes towards assistive devices. Research was conducted in two phases. The initial phase of the research was conducted with the distribution of questionnaires to people over the age of fifty that asked general questions and specific questions on type of devices being used. Phase One was followed on by Phase Two, where participants from Phase One who had come in contact with assistive devices were invited to participate in a semi-structured interview. Questions were put forth to the interviewee on their use of and attitudes towards assistive devices. Findings indicated that the reasons for the disuse in assistive devices were mostly design related; bulkiness, reliability, performance of the device, difficulty of use. The other main reason for disuse was socially related; elderly people preferred to undertake activities on their own and only use a device as a precaution or when absolutely necessary. They would prefer not having to rely on the devices. Living situation and difference in gender did not affect the preference for the use of assistive devices over personal assistance. The majority strongly supported the idea of remaining independent for as long as possible. In conclusion, this study proposes that through these findings, product designers will have a better understanding of the requirements of an elderly user. This will enable the designers to produce assistive devices that are more practical, personalised, reliable, easy to use and tie in with the older people’s environments. Additional research with different variables is recommended to further justify these findings.