Effects of Constraint Errors on Parallel Manipulators with Decoupled Motion

From perspective of structure synthesis, certain special geometric constraints, such as joint axes intersecting at one point or perpendicular to each other, are necessary in realizing the end-effector motion of kinematically decoupled parallel manipulators (PMs) along individual motion axes. These requirements are difficult to achieve in the actual system due to assembly errors and manufacturing tolerances. Those errors that violate the geometric constraint requirements are termed “constraint errors”. The constraint errors usually are more troublesome than other manipulator errors because the decoupled motion characteristics of the manipulator may no longer exist and the decoupled kinematic models will be rendered useless due to these constraint errors. Therefore, identification and prevention of these constraint errors in initial design and manufacturing stage are of great significance. In this article, three basic types of constraint errors are identified, and an approach to evaluate the effects of constraint errors on decoupling characteristics of PMs is proposed. This approach is illustrated by a 6-DOF PM with decoupled translation and rotation. The results show that the proposed evaluation method is effective to guide design and assembly.

Monkey and humans exhibit similar motion-processing mechanisms

Single cell recording studies have resulted in a detailed understanding of motion-sensitive neurons in non-human primate visual cortex. However, it is not known to what extent response properties of motion-sensitive neurons in the non-human primate brain mirror response characteristics of motion-sensitive neurons in the human brain. Using a motion adaptation paradigm, the direction aftereffect, we show that changes in the activity of human motion-sensitive neurons to moving dot patterns that differ in dot density bear a strong resemblance to data from macaque monkey. We also show a division-like inhibition between neural populations tuned to opposite directions, which also mirrors neural-inhibitory behaviour in macaque. These findings strongly suggest that motion-sensitive neurons in human and non-human primates share common response and inhibitory characteristics.

Subpixel interpolation architecture for multistandard video motion estimation

A new reconfigurable subpixel interpolation architecture for multistandard (e.g., MPEG-2, MPEG-4, H.264, and AVS) video motion estimation (ME) is presented. This exploits the mixed use of parallel and serial-input FIR filters to achieve high throughput rate and efficient silicon utilization. Silicon design studies show that this can be implemented using 34.8 × 10 3 gates with area and performance that compares very favorably with specific fixed solutions, e.g., for the H.264 standard alone. This can support SDTV and HDTV applications when implemented in 0.18 µm CMOS technology, with further performance enhancements achievable at 0.13 µm and below. © 2009 IEEE.

The photography and the motion landscape in the urban expressway

A new kind of photographic representation, called movement-image is proposed and discussed to record the visual experience of the journey through urban highways. It consists of performing long exposure photographic shots while the track is traversed, thus registering a time-panorama which includes landscape signs and inner spaces of the ways involved. This proposal is linked to the limitations of representing these expressways, if they are understood as structures of instrumental origin, where the resulting experience comes from moving at high speed through the territory. In al almost all cases the aesthetic approach or urban integration with the city and landscape are excluded. In this sense, although such structures may be an opportunity to collect, build and colonize the urban landscape, the lack of adequate representation of the phenomenon causes a difficulty in its understanding and transformation. The options for representation using photography is assumed, knowing its own particular tradition in the use of long exposures, for the expression of the mobile, and the multiple visual attention, divided or weakened.

Juxtaposition and Non-Motion: Varese Bridges Modernism and Electroacoustic Music

Edgard Vare` se’s Poe` me e´ lectronique can be viewed as a bridge between early twentieth-century modernism and electroacoustic music. This connection to early modernism is most clearly seen in its use of musical juxtaposition, a favoured technique of early modernist composers, especially those active in Paris. Juxtaposition and non-motion are considered here, particularly in relationship to Smalley’s exposition of spectromorphology (Smalley 1986), which in its preoccupation with motion omits any significant consideration of non-motion. Juxtaposition and non-motion have an important history within twentieth-century music, and as an early classic of electroacoustic music, Poe` me e´ lectronique is a particularly striking example of a composition that is rich in juxtapositions similar to those found in passages of early modernist music. Examining Poe` me e´ lectronique through the lens of juxtaposition and non-motion reveals how the organisation of its juxtaposed sounds encourages the experience of sound structure suspended time.

Reconfigurable system-on-a-chip motion estimation architecture for multi-standard video coding

A new domain-specific, reconfigurable system-on-a-chip (SoC) architecture is proposed for video motion estimation. This has been designed to cover most of the common block-based video coding standards, including MPEG-2, MPEG-4, H.264, WMV-9 and AVS. The architecture exhibits simple control, high throughput and relatively low hardware cost when compared with existing circuits. It can also easily handle flexible search ranges without any increase in silicon area and can be configured prior to the start of the motion estimation process for a specific standard. The computational rates achieved make the circuit suitable for high-end video processing applications, such as HDTV. Silicon design studies indicate that circuits based on this approach incur only a relatively small penalty in terms of power dissipation and silicon area when compared with implementations for specific standards. Indeed, the cost/performance achieved exceeds that of existing but specific solutions and greatly exceeds that of general purpose field programmable gate array (FPGA) designs.