921 resultados para Asynchronous logic circuits


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Research on how customers engage in the co-creation processes envisaged by the Servicedominant logic paradigm is currently limited and even less work has been published on frameworks for organizations to manage the co-creation process. This conceptual paper examines a particular aspect of co-creation: co-production as a result of the application of self-service technology (SST). We propose a conceptual framework for co-production, which emphasizes the need to understand productivity from the point of view of the customer, and demonstrate how this can be applied in both consumer (b2c) and interorganizational(b2b) contexts. We conclude that service organizations might benefit from clearly identifying co-production with task-performance, and co-creation with the valueattributing aspects of the customer service experience. Both aspects generate a range of design and management challenges for suppliers particularly the need to understand the cocreation process 'outputs' desired by customers and the full costs of moving away from person to person interaction.

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Thesis (Master's)--University of Washington, 2015

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Thesis (Master's)--University of Washington, 2015

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A compact highly linear microstrip dual - mode optically switchable filter and a reconfigurable power amplifier are presented. The key characteristics of the dual - mode switchable filter are investigated and described. A second order filter design procedure is outlined to facilitate the realisation of Butterworth and Chebyshev functions. The proposed filter was built and tested with an optical switch, which comprised of a silicon dice acti vated using near infrared light. The measured and simulated results are in good agreement. The measured insertion loss in the ON state was 3.0 dB the isolation in the OFF state was 45 dB at the centre frequency. An evaluation of filter distortion is presen ted for digitally modulated M - QAM and M - QAM OFDM singals.

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This paper present a methodology to choose the distribution networks reconfiguration that presents the lower power losses. The proposed methodology is based on statistical failure and repair data of the distribution power system components and uses fuzzy-probabilistic modeling for system component outage parameters. The proposed hybrid method using fuzzy sets and Monte Carlo simulation based on the fuzzyprobabilistic models allows catching both randomness and fuzziness of component outage parameters. A logic programming algorithm is applied, once obtained the system states by Monte Carlo Simulation, to get all possible reconfigurations for each system state. To evaluate the line flows and bus voltages and to identify if there is any overloading, and/or voltage violation an AC load flow has been applied to select the feasible reconfiguration with lower power losses. To illustrate the application of the proposed methodology, the paper includes a case study that considers a 115 buses distribution network.

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Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

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After a historical introduction, the bulk of the thesis concerns the study of a declarative semantics for logic programs. The main original contributions are: ² WFSX (Well–Founded Semantics with eXplicit negation), a new semantics for logic programs with explicit negation (i.e. extended logic programs), which compares favourably in its properties with other extant semantics. ² A generic characterization schema that facilitates comparisons among a diversity of semantics of extended logic programs, including WFSX. ² An autoepistemic and a default logic corresponding to WFSX, which solve existing problems of the classical approaches to autoepistemic and default logics, and clarify the meaning of explicit negation in logic programs. ² A framework for defining a spectrum of semantics of extended logic programs based on the abduction of negative hypotheses. This framework allows for the characterization of different levels of scepticism/credulity, consensuality, and argumentation. One of the semantics of abduction coincides with WFSX. ² O–semantics, a semantics that uniquely adds more CWA hypotheses to WFSX. The techniques used for doing so are applicable as well to the well–founded semantics of normal logic programs. ² By introducing explicit negation into logic programs contradiction may appear. I present two approaches for dealing with contradiction, and show their equivalence. One of the approaches consists in avoiding contradiction, and is based on restrictions in the adoption of abductive hypotheses. The other approach consists in removing contradiction, and is based in a transformation of contradictory programs into noncontradictory ones, guided by the reasons for contradiction.

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Radio frequency (RF) energy harvesting is an emerging technology that will enable to drive the next generation of wireless sensor networks (WSNs) without the need of using batteries. In this paper, we present RF energy harvesting circuits specifically developed for GSM bands (900/1800) and a wearable dual-band antenna suitable for possible implementation within clothes for body worn applications. Besides, we address the development and experimental characterization of three different prototypes of a five-stage Dickson voltage multiplier (with match impedance circuit) responsible for harvesting the RF energy. Different printed circuit board (PCB) fabrication techniques to produce the prototypes result in different values of conversion efficiency. Therefore, we conclude that if the PCB fabrication is achieved by means of a rigorous control in the photo-positive method and chemical bath procedure applied to the PCB it allows for attaining better values for the conversion efficiency. All three prototypes (1, 2 and 3) can power supply the IRIS sensor node for RF received powers of -4 dBm, -6 dBm and -5 dBm, and conversion efficiencies of 20, 32 and 26%, respectively. © 2014 IEEE.

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A genetic algorithm used to design radio-frequency binary-weighted differential switched capacitor arrays (RFDSCAs) is presented in this article. The algorithm provides a set of circuits all having the same maximum performance. This article also describes the design, implementation, and measurements results of a 0.25 lm BiCMOS 3-bit RFDSCA. The experimental results show that the circuit presents the expected performance up to 40 GHz. The similarity between the evolutionary solutions, circuit simulations, and measured results indicates that the genetic synthesis method is a very useful tool for designing optimum performance RFDSCAs.

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The paper presents a RFDSCA automated synthesis procedure. This algorithm determines several RFDSCA circuits from the top-level system specifications all with the same maximum performance. The genetic synthesis tool optimizes a fitness function proportional to the RFDSCA quality factor and uses the epsiv-concept and maximin sorting scheme to achieve a set of solutions well distributed along a non-dominated front. To confirm the results of the algorithm, three RFDSCAs were simulated in SpectreRF and one of them was implemented and tested. The design used a 0.25 mum BiCMOS process. All the results (synthesized, simulated and measured) are very close, which indicate that the genetic synthesis method is a very useful tool to design optimum performance RFDSCAs.

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To increase the amount of logic available in SRAM-based FPGAs manufacturers are using nanometric technologies to boost logic density and reduce prices. However, nanometric scales are highly vulnerable to radiation-induced faults that affect values stored in memory cells. Since the functional definition of FPGAs relies on memory cells, they become highly prone to this type of faults. Fault tolerant implementations, based on triple modular redundancy (TMR) infrastructures, help to keep the correct operation of the circuit. However, TMR is not sufficient to guarantee the safe operation of a circuit. Other issues like the effects of multi-bit upsets (MBU) or fault accumulation, have also to be addressed. Furthermore, in case of a fault occurrence the correct operation of the affected module must be restored and the current state of the circuit coherently re-established. A solution that enables the autonomous correct restoration of the functional definition of the affected module, avoiding fault accumulation, re-establishing the correct circuit state in realtime, while keeping the normal operation of the circuit, is presented in this paper.

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To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its use more attractive. However, these technological improvements also make FPGAs particularly vulnerable to configuration memory bit-flips caused by power fluctuations, strong electromagnetic fields and radiation. This issue is particularly sensitive because of the increasing amount of configuration memory cells needed to define their functionality. A short survey of the most recent publications is presented to support the options assumed during the definition of a framework for implementing circuits immune to bit-flips induction mechanisms in memory cells, based on a customized redundant infrastructure and on a detection-and-fix controller.

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Fault injection is frequently used for the verification and validation of the fault tolerant features of microprocessors. This paper proposes the modification of a common on-chip debugging (OCD) infrastructure to add fault injection capabilities and improve performance. The proposed solution imposes a very low logic overhead and provides a flexible and efficient mechanism for the execution of fault injection campaigns, being applicable to different target system architectures.

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Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial