A Precharge-Absorbed DPL Logic for Reducing Early Propagation Effects on FPGA Implementations
Data(s) |
2011
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Resumo |
In this paper, a new countermeasure against power and electromagnetic (EM) Side Channel Attacks (SCA) on FPGA implemented cryptographic algorithms is proposed. This structure mainly focuses on a critical vulnerability, Early Evaluation, also known as Early Propagation Effect (EPE), which exists in most conventional SCA-hardened DPL (Dual-rail with Precharge Logic) solutions. The main merit of this proposal is that the EPE can be effectively prevented by using a synchronized non regular precharge network, which maintains identical routing between the original and mirror parts, where costs and design complexity compared with previous EPE-resistant countermeasures are reduced, while security level is not sacrificed. Another advantage for our Precharge Absorbed(PA) - DPL method is that its Dual-Core style (independent architecture for true and false parts) could be generated using partial reconfiguration. This helps to get a dynamic security protection with better energy planning. That means system only keeps the true part which fulfills the normal en/decryption task in low security level, and reconfigures the false parts once high security level is required. A relatively limited clock speed is a compromise, since signal propagation is restricted to a portion of the clock period. In this paper, we explain the principles of PA-DPL and provide the guidelines to design this structure. We experimentally validate our methods in a minimized AES co-processor on Xilinx Virtex-5 board using electromagnetic (EM) attacks. |
Formato |
application/pdf |
Identificador | |
Idioma(s) |
spa |
Publicador |
E.T.S.I. Industriales (UPM) |
Relação |
http://oa.upm.es/12223/1/INVE_MEM_2011_99028.pdf http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6128580 |
Direitos |
http://creativecommons.org/licenses/by-nc-nd/3.0/es/ info:eu-repo/semantics/openAccess |
Fonte |
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, RECONFIG '11 | 2011 International Conference on Reconfigurable Computing and FPGAs, RECONFIG '11 | 30/11/2011 - 02/12/2011 | Cancú, México |
Palavras-Chave | #Electrónica #Ingeniería Industrial |
Tipo |
info:eu-repo/semantics/conferenceObject Ponencia en Congreso o Jornada PeerReviewed |