964 resultados para MOS capacitor


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This paper presents a new direct integration scheme for supercapacitors that are used to mitigate short term power fluctuations in wind power systems. The proposed scheme uses the popular dual inverter topology for grid connection as well as interfacing a supercapacitor bank. The dual inverter system is formed by cascading two 2-level inverters named as the “main inverter” and the “auxiliary inverter”. The main inverter is powered by the rectified output of a wind turbine coupled permanent magnet synchronous generator. The auxiliary inverter is directly connected to a super capacitor bank. This approach eliminates the need for an interfacing dc-dc converter for the supercapacitor bank and thus improves the overall efficiency. A detailed analysis on the effects of non-integer dynamically changing voltage ratio is presented. The concept of integrated boost rectifier is used to carry out the Maximum Power Point Tracking (MPPT) of the wind turbine generator. Another novel feature of this paper is the power reference adjuster which effectively manages capacitor charging and discharging at extreme conditions. Simulation results are presented to verify the efficacy of the proposed system in suppressing short term wind power fluctuations.

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Modulation and control of a cascade multilevel inverter, which has a high potential in future wind generation applications, are presented. The inverter is a combination of a high power, three level “bulk inverter” and a low power “conditioning inverter”. To minimize switching losses, the bulk inverter operates at a low frequency producing square wave outputs while high frequency conditioning inverter is used to suppress harmonic content produced by the bulk inverter output. This paper proposes an improved Space Vector Modulation (SVM) algorithm and a neutral point potential balancing technique for the inverter. Furthermore, a maximum power tracking controller for the Permanent Magnet Synchronous Generator (PMSG) is described in detail. The proposed SVM technique eliminates most of the computational burdens on the digital controller and renders a greater controllability under varying DC-link voltage conditions. The DC-link capacitor voltage balancing of both bulk and conditioning inverters is carried out using Redundant State Selection (RSS) method and is explained in detail. Experimental results are presented to verify the proposed modulation and control techniques.

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Conventional voltage driven gate drive circuits utilise a resistor to control the switching speed of power MOS-FETs. The gate resistance is adjusted to provide controlled rate of change of load current and voltage. The cascode gate drive configuration has been proposed as an alternative to the conventional resistor-fed gate drive circuit. While cascode drive is broadly understood in the literature the switching characteristics of this topology are not well documented. This paper explores, through both simulation and experimentation, the gate drive parameter space of the cascode gate drive configuration and provides a comparison to the switching characteristics of conventional gate drive.

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This chapter presents the stability analysis based on bifurcation theory of the distribution static compensator (DSTATCOM) operating both in current control mode as in voltage control mode. The bifurcation analysis allows delimiting the operating zones of nonlinear power systems and hence the computation of these boundaries is of interest for practical design and planning purposes. Suitable mathematical representations of the DSTATCOM are proposed to carry out the bifurcation analyses efficiently. The stability regions in the Thevenin equivalent plane are computed for different power factors at the Point of Common Coupling (PCC). In addition, the stability regions in the control gain space are computed, and the DC capacitor and AC capacitor impact on the stability are analyzed in detail. It is shown through bifurcation analysis that the loss of stability in the DSTATCOM is in general due to the emergence of oscillatory dynamics. The observations are verified through detailed simulation studies.

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This paper proposes a linear large signal state-space model for a phase controlled CLC (Capacitor Inductor Capacitor) Resonant Dual Active Bridge (RDAB). The proposed model is useful for fast simulation and for the estimation of state variables under large signal variation. The model is also useful for control design because the slow changing dynamics of the dq variables are relatively easy to control. Simulation results of the proposed model are presented and compared to the simulated circuit model to demonstrate the proposed model's accuracy. This proposed model was used for the design of a Proportional-Integral (PI) controller and it has been implemented in the circuit simulation to show the proposed models usefulness in control design.

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Electric distribution networks are now in the era of transition from passive to active distribution networks with the integration of energy storage devices. Optimal usage of batteries and voltage control devices along with other upgrades in network needs a distribution expansion planning (DEP) considering inter-temporal dependencies of stages. This paper presents an efficient approach for solving multi-stage distribution expansion planning problems (MSDEPP) based on a forward-backward approach considering energy storage devices such as batteries and voltage control devices such as voltage regulators and capacitors. The proposed algorithm is compared with three other techniques including full dynamic, forward fill-in, backward pull-out from the point of view of their precision and their computational efficiency. The simulation results for the IEEE 13 bus network show the proposed pseudo-dynamic forward-backward approach presents good efficiency in precision and time of optimization.

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Disconnector switch operation in GIS generates VFT voltages in the system. It is important, for insulation co-ordination purposes, to obtain accurate VFT V-t data for typical gap geometries found in GIS. This paper presents experimentally obtained VFT V-t data for a 180/1 lOmm co-axial gap. The VFT has a time to first peak of 35 ns and a oscillation frequency of 13,6 MHz. Due to the location of the voltage divider in a compartment adjacent to the gap, a correction factor of 1.1 is used to relate the measured breakdown voltage to that in the gap. Positive polarity VFT V-t data is presented for 1, 2, 3 and 4 bar absolute and negative polarity VFT data for 3 and 4 bar absolute. Two methods of generating the VFT's are used. The first is to power up the test transformer at power frequency. The second is to generate a switching impulse by discharging a capacitor into the primary of the test transformer.

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High-voltage circuit breakers are among the most important equipments for ensuring the efficient and safe operation of an electric power system. On occasion, circuit breaker operators may wish to check whether equipment is performing satisfactorily and whether controlled switching systems are producing reliable and repeatable stress control. Monitoring of voltage and current waveforms during switching using established methods will provide information about the magnitude and frequency of voltage transients as a result of re-ignitions and restrikes. However, high frequency waveform measurement requires shutdown of circuit breaker and use of specialized equipment. Two utilities, Hydro-Québec in Canada and Powerlink Queensland in Australia, have been working on the development and application of a non-intrusive, cost-effective and flexible diagnostic system for monitoring high-voltage circuit breakers for reactive switching. The proposed diagnostic approach relies on the non-intrusive assessment of key parameters such as operating times, prestrike characteristics, re-ignition and restrike detection. Transient electromagnetic emissions have been identified as a promising means to evaluate the abovementioned parameters non-intrusively. This paper describes two complimentary methods developed concurrently by Powerlink and Hydro-Québec. Also, return of experiences on the application to capacitor bank and shunt reactor switching is presented.

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As the conventional MOSFET's scaling is approaching the limit imposed by short channel effects, Double Gate (DG) MOS transistors are appearing as the most feasible candidate in terms of technology in sub-45nm technology nodes. As the short channel effect in DG transistor is controlled by the device geometry, undoped or lightly doped body is used to sustain the channel. There exits a disparity in threshold voltage calculation criteria of undoped-body symmetric double gate transistors which uses two definitions, one is potential based and the another is charge based definition. In this paper, a novel concept of "crossover point'' is introduced, which proves that the charge-based definition is more accurate than the potential based definition.The change in threshold voltage with body thickness variation for a fixed channel length is anomalous as predicted by potential based definition while it is monotonous for charge based definition.The threshold voltage is then extracted from drain currant versus gate voltage characteristics using linear extrapolation and "Third Derivative of Drain-Source Current'' method or simply "TD'' method. The trend of threshold voltage variation is found same in both the cases which support charge-based definition.

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As the conventional MOSFETs scaling is approaching the limit imposed by short channel effects, Double Gate (DG) MOS transistors are appearing as the most feasible andidate in terms of technology in sub-45nm technology nodes. As the short channel effect in DG transistor is controlled by the device geometry, undoped or lightly doped body, is used to sustain the channel. There exits a disparity in threshold voltage calculation criteria of undoped-body symmetric double gate transistors which uses two definitions, one is potential based and the another is charge based definition. In this paper, a novel concept of "crossover point" is introduced, which proves that the charge-based definition is more accurate than the potential based definition. The change in threshold voltage with body thickness variation for a fixed channel length is anomalous as predicted by, potential based definition while it is monotonous for change based definition. The threshold voltage is then extracted from drain currant versus gate voltage characteristics using linear extrapolation and "Third Derivative of Drain-Source Current" method or simply "TD" method. The trend of threshold voltage variation is found some in both the cases which support charge-based definition.

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In view of its non-toxicity, and good dielectric properties, castor oil, a polar liquid dielectric of vegetable origin is suggested as a possible alternative to PCB's for capacitor applications. In this paper the dielectric properties (including partial discharge behavior), of all-polypropylene and paper-polypropylene capacitors with castor oil as impregnant, are reported. The paper also contains results of life studies conducted under accelerated electrical and thermal stresses when they are occurring both individually and combined. The data obtained have been statistically analyzed and approximate life of the system calculated bylinear extrapolation.

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This paper develops a seven-level inverter structure for open-end winding induction motor drives. The inverter supply is realized by cascading four two-level and two three-level neutral-point-clamped inverters. The inverter control is designed in such a way that the common-mode voltage (CMV) is eliminated. DC-link capacitor voltage balancing is also achieved by using only the switching-state redundancies. The proposed power circuit structure is modular and therefore suitable for fault-tolerant applications. By appropriately isolating some of the inverters, the drive can be operated during fault conditions in a five-level or a three-level inverter mode, with preserved CMV elimination and DC-link capacitor voltage balancing, within a reduced modulation range.

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A novel CMOS Schmitt trigger using only four MOS transistors is discussed. This circuit, which works on the principle of load-coupled regenerative feedback, can be implemented using conventional CMOS technology with only one extra fabrication step. It can be implemented even more easily in CMOS/SOS (silicon-on-sapphire) integrated circuits. The hysteresis of this Schmitt trigger can be controlled by a proper choice of the transistor geometries.

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Metal oxide semiconductor (MOS) sensors are a class of chemical sensors that have potential for being a practical core sensor module for an electronic nose system in various environmental monitoring applications. However, the responses of these sensors may be affected by changes in humidity and this must be taken into consideration when developing calibration models. This paper characterises the humidity dependence of a sensor array which consists of 12 MOS sensors. The results were used to develop calibration models using partial least squares (PLS). Effects of humidity on the response of the sensor array and predictive ability of partial least squares are discussed. It is shown that partial least squares can provide proper calibration models to compensate for effects caused by changes in humidity. Special Issue: Selected Paper from the 12th International Symposium on Olfaction and Electronic Noses - ISOEN 2007, International Symposium on Olfaction and Electronic Noses.

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A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.