V-Transform: “An Enhanced Polynomial Coefficient Based DC Test for Non-linear Analog Circuits

Abstract—DC testing of parametric faults in non-linear analog circuits based on a new transformation, entitled, V-Transform acting on polynomial coefficient expansion of the circuit function is presented. V-Transform serves the dual purpose of monotonizing polynomial coefficients of circuit function expansion and increasing the sensitivity of these coefficients to circuit parameters. The sensitivity of V-Transform Coefficients (VTC) to circuit parameters is up to 3x-5x more than sensitivity of polynomial coefficients. As a case study, we consider a benchmark elliptic filter to validate our method. The technique is shown to uncover hitherto untestable parametric faults whose sizes are smaller than 10 % of the nominal values. I.

Scan cell reordering to minimize peak power during test cycle: A graph theoretic approach

Scan circuit is widely practiced DFT technology. The scan testing procedure consist of state initialization, test application, response capture and observation process. During the state initialization process the scan vectors are shifted into the scan cells and simultaneously the responses captured in last cycle are shifted out. During this shift operation the transitions that arise in the scan cells are propagated to the combinational circuit, which inturn create many more toggling activities in the combinational block and hence increases the dynamic power consumption. The dynamic power consumed during scan shift operation is much more higher than that of normal mode operation.

A Fast Linear Separability Test by Projection of Positive Points on Subspaces

A geometric and non parametric procedure for testing if two finite set of points are linearly separable is proposed. The Linear Separability Test is equivalent to a test that determines if a strictly positive point h > 0 exists in the range of a matrix A (related to the points in the two finite sets). The algorithm proposed in the paper iteratively checks if a strictly positive point exists in a subspace by projecting a strictly positive vector with equal co-ordinates (p), on the subspace. At the end of each iteration, the subspace is reduced to a lower dimensional subspace. The test is completed within r ≤ min(n, d + 1) steps, for both linearly separable and non separable problems (r is the rank of A, n is the number of points and d is the dimension of the space containing the points). The worst case time complexity of the algorithm is O(nr3) and space complexity of the algorithm is O(nd). A small review of some of the prominent algorithms and their time complexities is included. The worst case computational complexity of our algorithm is lower than the worst case computational complexity of Simplex, Perceptron, Support Vector Machine and Convex Hull Algorithms, if d

Analog/RF Built-in-Self-Test Subsystem for a Mobile Broadcast Video Receiver in 65-nm CMOS

A built-in-self-test (BIST) subsystem embedded in a 65-nm mobile broadcast video receiver is described. The subsystem is designed to perform analog and RF measurements at multiple internal nodes of the receiver. It uses a distributed network of CMOS sensors and a low bandwidth, 12-bit A/D converter to perform the measurements with a serial bus interface enabling a digital transfer of measured data to automatic test equipment (ATE). A perturbation/correlation based BIST method is described, which makes pass/fail determination on parts, resulting in significant test time and cost reduction.

Preparation, characterization and magnetic studies of Bi0.5X0.5(X=Ca,Sr)MnO3 nanoparticles

Nanoparticles (dia ~ 5 - 7 nm) of Bi0.5X0.5(X=Ca,Sr)MnO3 are prepared by polymer assisted sol-gel method and characterized by various physico-chemical techniques. X-ray diffraction gives evidence for single phasic nature of the materials as well as their structures. Mono dispersed to a large extent, isolated nanoparticles are seen in the transmission electron micrographs. High resolution electron microscopy shows the crystalline nature of the nanoparticles. Superconducting quantum interferometer based magnetic measurements from 10K to 300K show that these nanomanganites retain the charge ordering nature unlike Pr and Nd based nanomanganites. The CO in Bi based manganites is thus found to be very robust consistent with the observation that magnetic field of the order of 130 T are necessary to melt the CO in these compounds. These results are supported by electron magnetic resonance measurements.

Preparation of ultrafine CsCl crystallites by combined cryogenic and room temperature ball milling

The present investigation reports the preparation and microstructural characterization of ultrafine CsCl crystallites using combined cryogenic and room temperature (RT) mechanical milling. The milling has been performed in evacuated WC vials under high purity argon atmosphere. The low temperature milling has been utilized as an effective means of rapid fracturing of the CsCl crystallites. This was followed by RT milling for different time durations. The final crystallite size obtained is 10 +/- 6 nm for sample cryo-milled for 11 h and subsequently RT milled for 35 h. The experimental findings indicate the strong effect of duration of cryo-milling on the final size of the crystallites. The prolonged room temperature milling leads to increase of the crystallite size due to deformation-induced sintering. The results have been discussed in the light of currently available literature. (C) 2011 Elsevier Ltd and Techna Group S.r.l. All rights reserved.

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an analog voltage. This analog voltage controls the delay between this pair of clock signals, which is then measured in an all-digital manner using the technique of sub-sampling. This sub-sampling technique, having measurement time and accuracy trade-off, is well suited for low bandwidth signals. This concept is validated by designing delay cells, using current starved inverters in UMC 130nm CMOS process. Sub-mV accuracy is demonstrated for a measurement time of few seconds.

Nanocrystalline TiO(2) preparation by microwave route and nature of anatase-rutile phase transition in nano TiO(2)

Nanopowders of TiO(2) has been prepared using a microwave irradiation-assisted route, starting from a metalorganic precursor, bis(ethyl-3-oxo-butanoato)oxotitanium (IV), [TiO(etob)(2)](2). Polyvinylpyrrolidone (PVP) was used as a capping agent. The as-prepared amorphous powders crystallize into anatase phase, when calcined. At higher calcination temperature, the rutile phase is observed to form in increasing quantities as the calcination temperature is raised. The structural and physicochemical properties were measured using XRD, FT-IR, SEM, TEM and thermal analyses. The mechanisms of formation of nano-TiO(2) from the metal-organic precursor and the irreversible phase transformation of nano TiO(2) from anatase to rutile structure at higher temperatures have been discussed. It is suggested that a unique step of initiation of transformation takes place in Ti(1/2)O layers in anatase which propagates. This mechanism rationalizes several key observations associated with the anatase rutile transformation.