Superconducting fault current limiter design using parallel-connected YBCO thin films

Superconducting Fault Current Limiters (SFCLs) are able to reduce fault currents to an acceptable value, reducing potential mechanical and thermal damage to power system apparatus and allowing more flexibility in power system design and operation. The device can also help avoid replacing circuit breakers whose capacity has been exceeded. Due to limitations in current YBCO thin film manufacturing processes, it is not easy to obtain one large thin film that satisfies the specifications for high voltage and large current applications. The combination of standardized thin films has merit to reduce costs and maintain device quality, and it is necessary to connect these thin films in different series and parallel configurations in order to meet these specifications. In this paper, the design of a resistive type SFCL using parallel-connected YBCO thin films is discussed, including the role of a parallel resistor and the influence of individual thin film characteristics, based on both theory and experimental results. © 2009 IEEE.

Series-parallel six-element synthesis of biquadratic impedances

The object of this paper is to give a complete treatment of the realizability of positive-real biquadratic impedance functions by six-element series-parallel networks comprising resistors, capacitors, and inductors. This question was studied but not fully resolved in the classical electrical circuit literature. Renewed interest in this question arises in the synthesis of passive mechanical impedances. Recent work by the authors has introduced the concept of a regular positive-real functions. It was shown that five-element networks are capable of realizing all regular and some (but not all) nonregular biquadratic positive-real functions. Accordingly, the focus of this paper is on the realizability of nonregular biquadratics. It will be shown that the only six-element series-parallel networks which are capable of realizing nonregular biquadratic impedances are those with three reactive elements or four reactive elements. We identify a set of networks that can realize all the nonregular biquadratic functions for each of the two cases. The realizability conditions for the networks are expressed in terms of a canonical form for biquadratics. The nonregular realizable region for each of the networks is explicitly characterized. © 2004-2012 IEEE.

Nanowire and graphene architectures for room temperature THz detection

Antenna-coupled field effect transistors have been developed as plasma-wave THz detectors in both InAs nanowire and graphene channel material. Room temperature operation has been achieved up to frequencies of 1.5 THz, with noise equivalent powers as low as a few 10-11 W/Hz1/2, and high-speed response. © 2012 IEEE.

A temperature sensor from a self-assembled carbon nanotube microbridge

Recent studies show that carbon nanotubes (CNTs) can be used as temperature sensors, and offer great opportunities towards extreme miniaturization, high sensitivity, low power consumption, and rapid response. Previous CNT based temperature sensors are fabricated by either dielectrophoresis or piece-wise alignment of read-out electronics around randomly dispersed CNTs. We introduce a new deterministic and parallel microsensor fabrication method based on the self-assembly of CNTs into three-dimensional microbridges. We fabricated prototype microbridge sensors on patterned electrodes, and found their sensitivity to be better than -0.1 %/K at temperatures between 300K and 420K. This performance is comparable to previously published CNT based temperature sensors. Importantly, however, our research shows how unique sensor architectures can be made by self-assembly, which can be achieved using batch processing rather than piecewise assembly. ©2010 IEEE.

Parallel coordinates in computational engineering design

Modern Engineering Design involves the deployment of many computational tools. Re- search on challenging real-world design problems is focused on developing improvements for the engineering design process through the integration and application of advanced com- putational search/optimization and analysis tools. Successful application of these methods generates vast quantities of data on potential optimum designs. To gain maximum value from the optimization process, designers need to visualise and interpret this information leading to better understanding of the complex and multimodal relations between param- eters, objectives and decision-making of multiple and strongly conflicting criteria. Initial work by the authors has identified that the Parallel Coordinates interactive visualisation method has considerable potential in this regard. This methodology involves significant levels of user-interaction, making the engineering designer central to the process, rather than the passive recipient of a deluge of pre-formatted information. In the present work we have applied and demonstrated this methodology in two differ- ent aerodynamic turbomachinery design cases; a detailed 3D shape design for compressor blades, and a preliminary mean-line design for the whole compressor core. The first case comprises 26 design parameters for the parameterisation of the blade geometry, and we analysed the data produced from a three-objective optimization study, thus describing a design space with 29 dimensions. The latter case comprises 45 design parameters and two objective functions, hence developing a design space with 47 dimensions. In both cases the dimensionality can be managed quite easily in Parallel Coordinates space, and most importantly, we are able to identify interesting and crucial aspects of the relationships between the design parameters and optimum level of the objective functions under con- sideration. These findings guide the human designer to find answers to questions that could not even be addressed before. In this way, understanding the design leads to more intelligent decision-making and design space exploration. © 2012 AIAA.

Geometric perspectives on MDO and MDO architectures

Two main perspectives have been developed within the Multidisciplinary Design Optimization (MDO) literature for classifying and comparing MDO architectures: a numerical point of view and a formulation/data flow point of view. Although significant work has been done here, these perspectives have not provided much in the way of a priori information or predictive power about architecture performance. In this report, we outline a new perspective, called the geometric perspective, which we believe will be able to provide such predictive power. Using tools from differential geometry, we take several prominent architectures and describe mathematically how each constructs the space through which it moves. We then consider how the architecture moves through the space which it has constructed. Taken together, these investigations show how each architecture relates to the original feasible design manifold, how the architectures relate to each other, and how each architecture deals with the design coupling inherent to the original system. This in turn lays the groundwork for further theoretical comparisons between and analyses of MDO architectures and their behaviour using tools and techniques derived from differential geometry. © 2012 by the American Institute of Aeronautics and Astronautics, Inc. All rights reserved.

Output disturbance rejection using parallel model predictive control

The solution time of the online optimization problems inherent to Model Predictive Control (MPC) can become a critical limitation when working in embedded systems. One proposed approach to reduce the solution time is to split the optimization problem into a number of reduced order problems, solve such reduced order problems in parallel and selecting the solution which minimises a global cost function. This approach is known as Parallel MPC. The potential capabilities of disturbance rejection are introduced using a simulation example. The algorithm is implemented in a linearised model of a Boeing 747-200 under nominal flight conditions and with an induced wind disturbance. Under significant output disturbances Parallel MPC provides a significant improvement in performance when compared to Multiplexed MPC (MMPC) and Linear Quadratic Synchronous MPC (SMPC). © 2013 IEEE.

1 x 4 Ge-on-SOI PIN Photodetector Array for Parallel Optical Interconnects

High-quality Ge film was epitaxially grown on silicon on insulator using the ultrahigh vacuum chemical vapor deposition. In this paper, we demonstrated that the efficient 1 4 germanium-on-silicon p-i-n photodetector arrays with 1.0 mu m Ge film had a responsivity as high as 0.65 A/W at 1.31 mu m and 0.32 A/W at 1.55 mu m, respectively. The dark current density was about 0.75 mA/cm(2) at 0 V and 13.9 mA/cm(2) at 1.0 V reverse bias. The detectors with a diameter of 25 mu m were measured at 1550 nm incident light under 0 V bias, and the result showed that the 3-dB bandwidth is 2.48 GHz. At a reverse bias of 3 V, the bandwidth is about 13.3 GHz. The four devices showed a good consistency.

Magnetic field switching in parallel quantum dots

We show that the Coulomb blockade in parallel dots pierced by magnetic flux Phi completely blocks the resonant current for any value of Phi except for integer multiples of the flux quantum Phi(0). This non-analytic (switching) dependence of the current on Phi arises only when the dot states that carry the current are of the same energy. The time needed to reach the steady state, however, diverges when Phi -> n Phi(0). Copyright (C) EPLA, 2009

A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE) array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps). A prototype chip with 64 x 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mu m Standard CMOS process. The area size of chip is 1.5 mm x 3.5 mm. Each pixel size is 9.5 mu m x 9.5 mu m and each processing element size is 23 mu m x 29 mu m. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

Optical microwave generation using two parallel DFB lasers integrated with Y-branch waveguide coupler

A new device of two parallel distributed feedback (DFB) lasers integrated monolithically with Y-branch waveguide coupler was fabricated by means of quantum well intermixing. Optical microwave signal was generated in the Y-branch waveguide coupler through frequency beating of the two laser modes coming from two DFB laser in parallel, which had a small difference in frequency. Continuous rapid tuning of optical microwave signal from 13 to 42 GHz were realized by adjusting independently the driving currents injected into the two DFB lasers.

Interdot interaction induced zero-bias maximum of the differential conductance in parallel double quantum dots

We have studied the equilibrium and nonequilibrium electronic transports through a double quantum dot coupled to leads in a symmetrical parallel configuration in the presence of both the inter- and the intradot Coulomb interactions. The influences of the interdot interaction and the difference between dot levels on the local density of states (LDOS) and the differential conductance are paid special attention. We find an interesting zero-bias maximum of the differential conductance induced by the interdot interaction, which can be interpreted in terms of the LDOS of the two dots. Due to the presence of the interdot interaction, the LDOS peaks around the dot levels epsilon(i) are split, and as a result, the most active energy level which supports the transport is shifted near to the Fermi level of the leads in the equilibrium situation. (c) 2006 American Institute of Physics.

Determination of the absorption for incident light propagating parallel through the guest-host polymer film waveguide

Guest host polymer thin films of polymethyl methacrylate (PMMA) incorporated with (4'-nitrobenzene)-3-azo-9-ethylcarbazole (NAEC) were fabricated by spin coating and then poled by the method of corona-onset poling at elevated temperature. The absorption mechanism of the polymeric film, which is very important for the optical transmission losses and directly relates to the orientation of chromophore NAEC in polymer PMMA, was investigated in detail. From the UV-visible absorption spectra for NAEC/PMMA film before and after being poled, we determined the change of absorption coefficient kappa with the wavelength and approximately calculated the maximum absorption A(parallel tomax) as 3.46 for incident light propagating parallel through the film, i.e. the ordinary polarized light, which cannot be directly measured in the spectro photometer. (C) 2002 Elsevier Science Ltd. All rights reserved.

Nanoelectronic Circuit Architectures Based on Single-Electron Turnstiles

Single-electron devices (SEDs) have ultra-low power dissipation and high integration density, which make them promising candidates as basic circuit elements of the next generation VLSI circuits. In this paper, we propose two novel circuit single-electron architectures: the single-electron simulated annealing algorithm (SAA) circuit and the single-electron cellular neural network (CNN). We used the MOSFET-based single-electron turnstile [1] as the basic circuit element. The SAA circuit consists of the voltage-controlled single-electron random number generator [2] and the single-electron multiple-valued memories (SEMVs) [3]. The random-number generation and variable variations in SAA are easily achieved by transferring electrons using the single-electron turnstile. The CNN circuit used the floating-gate single-electron turnstile as the neural synapses, and the number of electrons is used to represent the cells states. These novel circuits are promising in future nanoscale integrated circuits.