Design of novel polarization beam splitter in two-dimensional photonic crystal

We present the design and the simulation of an ultracompact high efficiency polarization beam splitter (PBS) based on the properties of the light waves propagating in straight waveguide and composite structure photonic crystal. The splitting properties of the PBS are numerically simulated and analyzed by using the plane wave expansion (PWE) method and finite difference time domain (FDTD) method. The PBS consists of three parts, namely, input waveguide, beam structure and output waveguide. It is shown that a high efficiency and a large separating angle for TE mode and TM mode can be achieved. Owing to these excellent features, including small size and high rate, the PBS makes a promising candidate in the future photonic integrated circuits.

A new way of uniform splitting of the optical power by directional coupling between the photonic crystal waveguides

Directional coupler can be constructed by putting multiple photonic crystal waveguides together. The propagation of the optical field entering this system symmetrically was analysed numerically according to self-imaging principle. On the basis of this structure, ultracompact multiway beam splitter was designed and the ones with three and four output channels were discussed in details as examples. By simply tuning the effective refractive index of two dielectric rods in the coupler symmetrically to induce the redistribution of the power of the optical field, uniform or free splitting can be achieved. Compared with the reported results, this way is simpler, more feasible and more efficient and has extensive practical value in future photonic integrated circuits.

Investigation progress on key photonic integration for application in optical communication network

Proceeding from the consideration of the demands from the functional architecture of high speed, high capacity optical communication network, this paper points out that photonic integrated devices, including high speed response laser source, narrow band response photodetector high speed wavelength converter, dense wavelength multi/demultiplexer, low loss high speed response photo-switch and multi-beam coupler are the key components in the system. The, investigation progress in the laboratory will be introduced.

Wavelength tunable distributed Bragg reflector laser integrated with electro-absorption modulator by a combined method of selective area growth and quantum well intermixing - art. no. 68240N

Wavelength tunable electro-absorption modulated distributed Bragg reflector lasers (TEMLs) are promising light source in dense wavelength division multiplexing (DWDM) optical fiber communication system due to high modulation speed, small chirp, low drive voltage, compactness and fast wavelength tuning ability. Thus, increased the transmission capacity, the functionality and the flexibility are provided. Materials with bandgap difference as large as 250nm have been integrated on the same wafer by a combined technique of selective area growth (SAG) and quantum well intermixing (QWI), which supplies a flexible and controllable platform for the need of photonic integrated circuits (PIC). A TEML has been fabricated by this technique for the first time. The component has superior characteristics as following: threshold current of 37mA, output power of 3.5mW at 100mA injection and 0V modulator bias voltage, extinction ratio of more than 20 dB with modulator reverse voltage from 0V to 2V when coupled into a single mode fiber, and wavelength tuning range of 4.4nm covering 6 100-GHz WDM channels. A clearly open eye diagram is observed when the integrated EAM is driven with a 10-Gb/s electrical NRZ signal. A good transmission characteristic is exhibited with power penalties less than 2.2 dB at a bit error ratio (BER) of 10(-10) after 44.4 km standard fiber transmission.

Monolithic Integration of Light Emitting Diodes, Photodetector and Receiver Circuit in Standard CMOS Technology

A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) is designed and fabricated with standard 0.35 mu m CMOS technology. This OEIC circuit consists of light emitting diodes (LED), silicon dioxide waveguide, photodiodes and receiver circuit. The silicon LED operates in reverse breakdown mode and can be turned on at 8.5V 10mA. The silicon dioxide waveguide is composed of multiple layers of silicon dioxide between different metals layers. A two PN-junctions photodetector composed of n-well/p-substrate junction and p(+) active implantation/n-well junction maximizes the depletion region width. The readout circuitry in pixels is exploited to handle as small as 0.1nA photocurrent. Simulation and testing results show that the optical emissions powers are about two orders higher than the low frequency detectivity of silicon CMOS photodetcctor and receiver circuit.

Design and Verification of the Programming Circuit in an Application-Specific FPGA

In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.

A Novel Low-Power Digital Baseband Circuit for UHF RFID Tag with Sensors

A novel low-power digital baseband circuit for UHF RFID tag with sensors is presented in this paper. It proposes a novel baseband architecture and a new operating scheme to fulfill the sensor functions and to reduce power consumption. It is also compatible with the EPC C1G2 UHF RFID protocol. It adopts some advanced low power techniques for system design and circuit design: adaptive clock-gating, multi-clock domain and asynchronous circuit. The baseband circuit is implemented in 0.18um 1P3M standard CMOS process. ne chip area is 0.28 mm(2) excluding test pads. Its power consumption is 25uW under 1.1V power supply.

A low power integrated CMOS transmitter for BCI system

The prototype wafer of a low power integrated CMOS Transmitter for short-range biotelemetry application has been designed and fabricated, which is prospective to be implanted in the human brain to transfer the extracted neural information to the external computer. The transmitter consists of five parts, a bandgap current regulator, a ring oscillator, a buffer, a modulator and a power transistor. High integration and low power are the most distinct criteria for such an implantable integrated circuit. The post-simulation results show that under a 3.3 V power supply the transmitter provides 100.1 MHz half-wave sinusoid current signal to drive the off-chip antenna, the output peak current range is -0.155 mA similar to 1.250 mA, and on-chip static power dissipation is low to 0.374 mW. All the performances of the transmitter satisfy the demands of wireless real-time BCI system for neural signals recording and processing.

A High Speed, 12-Channel Parallel, Monolithic Integrated CMOS OEIC Receiver

The design and fabrication of a high speed, 12-channel monolithic integrated CMOS optoelectronic integrated circuit(OEIC) receiver are reported.Each channel of the receiver consists of a photodetector,a transimpedance amplifier,and a post-amplifier.The double photodiode structure speeds up the receiver but hinders responsivity.The adoption of active inductors in the TIA circuit extends the-3dB bandwidth to a higher level.The receiver has been realized in a CSMC 0.6μm standard CMOS process.The measured results show that a single channel of the receiver is able to work at bit rates of 0.8～1.4Gb/s. Altogether, the 12-channel OEIC receiver chip can be operated at 15Gb/s.

A semiconductor laser suitably fabricated by planar technology

The semiconductor microlasers with an equilateral triangle resonator which can be fabricated by dry etching technique from the laser wafer of the edge emitting laser, are analyzed by FDTD technique and rate equations. The results show that ETR microlaser is suitable to realize single mode operation. By connecting an output waveguide to one of the vertices of the ETR, we still can get the confined modes with high quality factors. The EM microlasers are potential light sources for photonic integrated circuits.

Hybrid CMOS/VCSEL optoelectronic modules

We report some investigations on vertical cavity surface emitting laser (VCSEL) arrays and VCSEL based optoelectronic smart photonic multiple chip modules (MCM), consisting of 1x16 vertical cavity surface emitting laser array and 16-channel lasers driver 0.35 Pin CMOS circuit. The hybrid integrated multiple chip modules based on VCSEL operate at more than 2GHz in -3dB frequency bandwidth.

Small signal equivalent circuit model of vertical cavity surface emitting lasers

Small signal equivalent circuit model of vertical cavity surface emitting lasers (VCSEL's) is given in this paper. The modulation properties of VCSEL are simulated using this model in Pspice program. The simulation results are good agree with experiment data. Experiment is performed to testify the circuit model.

Silicon: the promising material for phontonic integrated circuits platform

The development of optical network demands integrated arid multiple functionality modules to lowing cost and acquire highly reliability. Among the various contender materials to be photonic integrated circuits platform, silicon exhibits dominant characteristics and is the most promising platform materials. The paper compares the characteristics of some candidate materials with silicon and reviews recent progress in silicon based photonic integration technology. Tile challenges to silicon for optical integration for optical networking application arc also indicated.

Integrated multimode interference couplers in silicon-on insulator

Silicon-on insulator (SOI) is an attractive platform for the fabrication of optoelectronic integrated circuit. Thin cladding layers (< 1.0m) can be used in SOI waveguide due to the large index step between Si and SiO2, making them compatible with the VLSI technology. Here we demonstrate the fabrication of 1 x 4 and 2 x 2 multimode interference (MMI) coupler based on SOI technology. Performances of the devices are analyzed. The minimum excess loss of the devices is about 1.8dB. The devices show uniform power distribution.