942 resultados para OPEN-CIRCUIT VOLTAGE
Resumo:
In this paper the soft turn-on of NPT IGBT under Active Voltage Control (AVC) is presented. The AVC technique is able to control the IGBT switching trajectory according to a pre-defined reference signal generated by a FPGA chip. By applying a special designed reference signal at turn-on, the IGBT turn-on current overshoot and diode recovery can be optimized. Experiments of soft turn-on with different reference signal are presented in this paper. This technique can be used to reduce the switching stress on the device and on other components of the circuit. © 2011 IEEE.
Resumo:
An advanced 700V Smart Trench IGBT with monolithically integrated over-voltage and over-current protecting circuits is presented in this paper. The proposed Smart IGBT comprises a sense IGBT, a low voltage lateral n-channel MOSFET (M 1), an avalanche diode (D av), and poly-crystalline Zener diodes (ZD) and resistor (R poly). Mix-mode transient simulations with MEDICI have proven the functionalities of the protecting circuits when the device is operating under abnormal conditions, such as Unclamped Inductive Switching (UIS) and Short Circuit (SC) condition. A Trench IGBT process is used to fabricate this device with total 11 masks including one metal mask only. The characterizations of the fabricated device exhibit the clamping capability of the avalanche diode and voltage pull-down ability of the MOSFET. © 2012 IEEE.
Resumo:
With series insulated-gate bipolar transistor (IGBT) operation, well-matched gate drives will not ensure balanced dynamic voltage sharing between the switching devices. Rather, it is IGBT parasitic capacitances, mainly gate-to-collector capacitance Cgc, that dominate transient voltage sharing. As Cgc is collector voltage dependant and is significantly larger during the initial turn-off transition, it dominates IGBT dynamic voltage sharing. This paper presents an active control technique for series-connected IGBTs that allows their dynamic voltage transition dV\ce/dt to adaptively vary. Both switch ON and OFF transitions are controlled to follow a predefined dVce/dt. Switching losses associated with this technique are minimized by the adaptive dv /dt control technique incorporated into the design. A detailed description of the control circuits is presented in this paper. Experimental results with up to three series devices in a single-ended dc chopper circuit, operating at various low voltage and current levels, are used to illustrate the performance of the proposed technique. © 2012 IEEE.
Resumo:
Thyristors are usually three-terminal devices that have four layers of alternating p-type and n-type material (i.e. three p-n junctions) comprising its main power handling section. In contrast to the linear relation which exists between load and control currents in a transistor, the thyristor is bistable. The control terminal of the thyristor, called the gate (G) electrode, may be connected to an integrated and complex structure as a part of the device. Thyristors are used to approximate ideal closed (no voltage drop between anode and cathode) or open (no anode current flow) switches for control of power flow in a circuit. This differs from low-level digital switching circuits that are designed to deliver two distinct small voltage levels while conducting small currents (ideally zero). Thyristor circuits must have the capability of delivering large currents and be able to withstand large externally applied voltages. All thyristor types are controllable in switching from a forward-lockingstate (positive potential applied to the anode with respect to the cathode, with correspondingly little anode current flow) into a forward-conduction state (large forward anode current flowing, with a small anode-cathode potential drop). Most thyristors have the characteristic that after switching from a forward-blocking state into the forward-conduction state, the gate signal can be removed and the thyristor will remain in its forward-conduction mode. This property is termed "latching" and is an important distinction between thyristors and other types of power electronic devices. © 2007 Elsevier Inc. All rights reserved.
Resumo:
High-performance power switching devices (IGBT/MOSFET) realise high-performance power converters. Unfortunately, with a high switching speed of the IGBT or MOSFET freewheel diode chopper cell, the circuit has intrinsic sources of high-level EMI. Therefore, costly EMI filters or shielding are normally demanded on the load and supply side. Although an S-shaped voltage transient with a high order of derivation eliminates the discontinuity and could suppress HF spectrum of EMI emissions, a practical control scheme is still under development. In this paper, Active Voltage Control (AVC) is applied to successfully define IGBT switching dynamics with a smoothed Gaussian waveform so a reduced EMI can be achieved without extra EMI suppression devices. © 2013 IEEE.
Resumo:
This paper investigates a nonlinear amplitude saturation behavior in an electrostatically transduced, silicon MEMS disk resonator operating in its secondary elliptical bulk-mode (SEBM) at 3.932 MHz towards its implementation as an all-mechanical automatic gain control (AGC) element. The nonlinear vibration behavior of the SEBM mode is experimentally observed in open-loop testing such that above a threshold small signal drive voltage at a given polarization voltage, the vibration amplitude of the SEBM mode saturates. We also study this nonlinearity in an oscillator circuit designed such that the driving power level at the resonator input can be manually tuned as the circuit operates. The measurements of the voltage amplitudes show a clear transition from the linear to the nonlinear saturation region as the driving power is increased. Short-term frequency stability measurements were also conducted for different v ac and the resulting Allan deviation plots show an improvement in the short-term stability from 1.4 ppb in the linear region to 0.4 ppb in the amplitude saturation region. © 2013 IEEE.
Resumo:
Voltage-dependent anion channel (VDAC, also known as mitochondrial porin) is acknowledged to play an important role in stress-induced mammalian apoptosis. In this study, Paralichthys olivaceus VDAC (PoVDAC) gene was identified as a virally induced gene from Scophthalmus Maximus Rhabdovirus (SMRV)-infected flounder embryonic cells (FEC). The full length of PoVDAC cDNA is 1380 bp with an open reading frame of 852 bp encoding a 283 amino acid protein. The deduced PoVDAC contains one alpha-helix, 13 transmembrane beta-strands and one eukaryotic mitochondrial porin signature motif. Constitutive expression of PoVDAC was confirmed in all tested tissues by real-time PCR. Further expression analysis revealed PoVDAC mRNA was upregulated by viral infection. We prepared fish antiserum against recombinant VDAC proteins and detected the PoVDAC in heart lysates from flounder as a 32 kDa band on western blot. Overexpression of PoVDAC in fish cells induced apoptosis. Immunofluoresence localization indicated that the significant distribution changes of PoVDAC have occurred in virus-induced apoptotic cells. This is the first report on the inductive expression of VDAC by viral infection, suggesting that PoVDAC might be mediated flounder antiviral immune response through induction of apoptosis. (c) 2007 Elsevier Ltd. All rights reserved.
Resumo:
The unexpected decrease in measured responsivity observed in a specific GaN Schottky barrier photodetector (PD) at high reverse bias voltage was investigated and explained. Device equivalent transforms and small signal analysis were performed to analyse the test circuit. On this basis, a model was built which explained the responsivity decrease quantitatively. After being revised by this model, responsivity curves varying with bias voltage turned out to be reasonable. It is proved that the decrease is related to the dynamic parallel resistance of the photodiode. The results indicate that with a GaN Schottky PD, the choice of load resistance is restricted according to the dynamic parallel resistance of the device to avoid responsivity decay at high bias voltage.
Resumo:
This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.
Resumo:
Based oil rare equations of semiconductor laser, a symbolically-defined model for optical transmission system performance evaluation and network characterization in both time- and frequency domains is presented. The steady-state and small-signal characteristics, such as current-photon density curve, current-voltage curve, and input impedance, call be predicted from this model. Two important dynamic characteristics, second-order harmonic distortion and two-tone third-order intermodulation products, are evaluated under different driving conditions. Experiments show that the simulated results agree well with the published data. (c) 2007 Wiley Periodicals, Inc.
Resumo:
We report a resonant tunneling diode (RTD) small signal equivalent circuit model consisting of quantum capacitance and quantum inductance. The model is verified through the actual InAs/In0.53Ga0.47As/AlAs RTD fabricated on an InP substrate. Model parameters are extracted by fitting the equivalent circuit model with ac measurement data in three different regions of RTD current-voltage (I-V) characteristics. The electron lifetime, representing the average time that the carriers remain in the quasibound states during the tunneling process, is also calculated to be 2.09 ps.
Resumo:
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.
Resumo:
Single-electron devices (SEDs) have ultra-low power dissipation and high integration density, which make them promising candidates as basic circuit elements of the next generation VLSI circuits. In this paper, we propose two novel circuit single-electron architectures: the single-electron simulated annealing algorithm (SAA) circuit and the single-electron cellular neural network (CNN). We used the MOSFET-based single-electron turnstile [1] as the basic circuit element. The SAA circuit consists of the voltage-controlled single-electron random number generator [2] and the single-electron multiple-valued memories (SEMVs) [3]. The random-number generation and variable variations in SAA are easily achieved by transferring electrons using the single-electron turnstile. The CNN circuit used the floating-gate single-electron turnstile as the neural synapses, and the number of electrons is used to represent the cells states. These novel circuits are promising in future nanoscale integrated circuits.
Resumo:
This paper presents a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. The proposed charge pump has been used as a part of the power supply section of fully integrated passive radio frequency identification(RFID) transponder IC, which has been implemented in a 0.35-um CMOS technology with embedded EEPROM offered by Chartered Semiconductor. The proposed DC/DC charge pump can generate stable output for RFID applications with low power dissipation and high pumping efficiency. The analytical model of the voltage multiplier, the comparison with other charge pumps, the simulation results, and the chip testing results are presented.