Network Rhythms Influence the Relationship between Spike-Triggered Local Field Potential and Functional Connectivity

Characterizing the functional connectivity between neurons is key for understanding brain function. We recorded spikes and local field potentials (LFPs) from multielectrode arrays implanted in monkey visual cortex to test the hypotheses that spikes generated outward-traveling LFP waves and the strength of functional connectivity depended on stimulus contrast, as described recently. These hypotheses were proposed based on the observation that the latency of the peak negativity of the spike-triggered LFP average (STA) increased with distance between the spike and LFP electrodes, and the magnitude of the STA negativity and the distance over which it was observed decreased with increasing stimulus contrast. Detailed analysis of the shape of the STA, however, revealed contributions from two distinct sources-a transient negativity in the LFP locked to the spike (similar to 0 ms) that attenuated rapidly with distance, and a low-frequency rhythm with peak negativity similar to 25 ms after the spike that attenuated slowly with distance. The overall negative peak of the LFP, which combined both these components, shifted from similar to 0 to similar to 25 ms going from electrodes near the spike to electrodes far from the spike, giving an impression of a traveling wave, although the shift was fully explained by changing contributions from the two fixed components. The low-frequency rhythm was attenuated during stimulus presentations, decreasing the overall magnitude of the STA. These results highlight the importance of accounting for the network activity while using STAs to determine functional connectivity.

Stabilizing a pulsed field emission from an array of carbon nanotubes

In this paper, we propose a new design configuration for a carbon nanotube (CNT) array based pulsed field emission device to stabilize the field emission current. In the new design, we consider a pointed height distribution of the carbon nanotube array under a diode configuration with two side gates maintained at a negative potential to obtain a highly intense beam of electrons localized at the center of the array. The randomly oriented CNTs are assumed to be grown on a metallic substrate in the form of a thin film. A model of field emission from an array of CNTs under diode configuration was proposed and validated by experiments. Despite high output, the current in such a thin film device often decays drastically. The present paper is focused on understanding this problem. The random orientation of the CNTs and the electromechanical interaction are modeled to explain the self-assembly. The degraded state of the CNTs and the electromechanical force are employed to update the orientation of the CNTs. Pulsed field emission current at the device scale is finally obtained by using the Fowler-Nordheim equation by considering a dynamic electric field across the cathode and the anode and integration of current densities over the computational cell surfaces on the anode side. Furthermore we compare the subsequent performance of the pointed array with the conventionally used random and uniform arrays and show that the proposed design outperforms the conventional designs by several orders of magnitude. Based on the developed model, numerical simulations aimed at understanding the effects of various geometric parameters and their statistical features on the device current history are reported.

A Simulation Based Study and Analysis of Double Gate Tunnel FET Performance for Low Stand-By Power Applications

The conventional metal oxide semiconductor field effect transistor (MOSFET)may not be suitable for future low standby power (LSTP) applications due to its high off-state current as the sub-threshold swing is theoretically limited to 60mV/decade. Tunnel field effect transistor (TFET) based on gate controlled band to band tunneling has attracted attention for such applications due to its extremely small sub-threshold swing (much less than 60mV/decade). This paper takes a simulation approach to gain some insight into its electrostatics and the carrier transport mechanism. Using 2D device simulations, a thorough study and analysis of the electrical parameters of the planar double gate TFET is performed. Due to excellent sub-threshold characteristics and a reverse biased structure, it offers orders of magnitude less leakage current compared to the conventional MOSFET. In this work, it is shown that the device can be scaled down to channel lengths as small as 30 nm without affecting its performance. Also, it is observed that the bulk region of the device plays a major role in determining the sub-threshold characteristics of the device and considerable improvement in performance (in terms of ION/IOFF ratio) can be achieved if the thickness of the device is reduced. An ION/IOFF ratio of 2x1012 and a minimum point sub-threshold swing of 22mV/decade is obtained.

Nature of Electronic States in Atomically Thin MoS(2) Field-Effect Transistors

We present low-temperature electrical transport experiments in five field-effect transistor devices consisting of monolayer, bilayer, and trilayer MoS(2) films, mechanically exfoliated onto Si/SiO(2) substrate. Our experiments reveal that the electronic states In all films are localized well up to room temperature over the experimentally accessible range of gate voltage. This manifests in two-dimensional (2D) variable range hopping (VRH) at high temperatures, while below similar to 30 K, the conductivity displays oscillatory structures In gate voltage arising from resonant tunneling at the localized sites. From the correlation energy (T(0)) of VRH and gate voltage dependence of conductivity, we suggest that Coulomb potential from trapped charges In the substrate is the dominant source of disorder in MoS(2) field-effect devices, which leads to carrier localization, as well.

Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes

We propose robust and scalable processes for the fabrication of floating gate devices using ordered arrays of 7 nm size gold nanoparticles as charge storage nodes. The proposed strategy can be readily adapted for fabricating next generation (sub-20 nm node) non-volatile memory devices.

Characteristics of j.f.e.t.s. taking the separation of gate electrode from the source and drain electrodes into account

The performance characteristics of a junction field-effect transistor (j.f.e.t.) are evaluated considering the presence of the gap between the gate electrode and the source and drain terminals. It is concluded that the effect of the gap is to demand a higher drain voltage to maintain the same drain current. So long as the device is operated at the same drain current, the presence of the gap does not change the performance of the device as an amplifier. The nature of the performance of the device as a variable resistor is not affected by the gap if it is less than or equal to the physical height of the channel. For gap lengths larger than the channel height, the effect of the gap is to add a series resistance in the drain.

Bose-Hubbard model in a strong effective magnetic field: Emergence of a chiral Mott insulator ground state

Motivated by experiments on Josephson junction arrays, and cold atoms in an optical lattice in a synthetic magnetic field, we study the ``fully frustrated'' Bose-Hubbard model with half a magnetic flux quantum per plaquette. We obtain the phase diagram of this model on a two-leg ladder at integer filling via the density matrix renormalization group approach, complemented by Monte Carlo simulations on an effective classical XY model. The ground state at intermediate correlations is consistently shown to be a chiral Mott insulator (CMI) with a gap to all excitations and staggered loop currents which spontaneously break time-reversal symmetry. We characterize the CMI state as a vortex supersolid or an indirect exciton condensate, and discuss various experimental implications.

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.

Analytical Field-Effect Method for Extraction of Subgap States in Thin-Film Transistors

We present an analytical field-effect method to extract the density of subgap states (subgap DOS) in amorphous semiconductor thin-film transistors (TFTs), using a closed-form relationship between surface potential and gate voltage. By accounting the interface states in the subthreshold characteristics, the subgap DOS is retrieved, leading to a reasonably accurate description of field-effect mobility and its gate voltage dependence. The method proposed here is very useful not only in extracting device performance but also in physically based compact TFT modeling for circuit simulation.

Fluorescence Enhancement Using Silver Nanotriangle Arrays

We describe the fabrication of silver nanotriangle array using angle resolved nanosphere lithography and utilizing the same for enhancing fluorescence. The well established nanosphere lithography is modified by changing the angle of deposition between the nanosphere mask and the beam of silver being deposited resulting in nanotriangles of varying surface area and density. The 470 nm plasmon resonance wavelength of the substrate was determined using minimum reflectivity method which closely matches with excitation wavelength of the fluorophore. Ten times enhancement in fluorescence emission intensity is obtained from fluorescein isothiocyanate coated on top of silver nanotriangle array separated by a spacer layer of poly vinyl alcohol as compared to glass. The enhanced fluorescence emission is attributed to the increase in local field enhancement.

Porous Three Dimensional Arrays of Plasmonic Nanoparticles

Plasmonic interactions in a well-defined array of metallic nanoparticles can lead to interesting optical effects, such as local electric field enhancement and shifts in the extinction spectra, which are of interest in diverse technological applications, including those pertaining to biochemical sensing and photonic circuitry. Here, we report on a single-step wafer scale fabrication of a three-dimensional array of metallic nanoparticles whose sizes and separations can be easily controlled to be anywhere between fifty to a few hundred nanometers, allowing the optical response of the system to be tailored with great control in the visible region of the spectrum. The substrates, apart from having a large surface area, are inherently porous and therefore suitable for optical sensing applications, such as surface enhanced Raman scattering, containing a high density of spots with enhanced local electric fields arising from plasmonic couplings.

High field carrier transport in graphene: Insights from fast current transient

In this work, we observe gate tunable negative differential conductance (NDC) and current saturation in single layer and bilayer graphene transistor at high source-drain field, which arise due to the interplay among (1) self-heating, (2) hot carrier injection, and (3) drain induced minority carrier injection. The magnitude of the NDC is found to be reduced for a bilayer, in agreement with its weaker carrier-optical phonon coupling and less efficient hot carrier injection. The contributions of different mechanisms to the observed results are decoupled through fast transient measurements with nanosecond resolution. The findings provide insights into high field transport in graphene. (C) 2012 American Institute of Physics. http://dx.doi.org/10.1063/1.4754103]

A low-noise low-power noise-adaptive neural amplifier in 0.13um CMOS technology

Chronic recording of neural signals is indispensable in designing efficient brain machine interfaces and in elucidating human neurophysiology. The advent of multichannel microelectrode arrays has driven the need for electronics to record neural signals from many neurons. The dynamic range of the system is limited by background system noise which varies over time. We propose a neural amplifier in UMC 130 nm, 2P8M CMOS technology. It can be biased adaptively from 200 nA to 2 uA, modulating input referred noise from 9.92 uV to 3.9 uV. We also describe a low noise design technique which minimizes the noise contribution of the load circuitry. The amplifier can pass signal from 5 Hz to 7 kHz while rejecting input DC offsets at electrode-electrolyte interface. The bandwidth of the amplifier can be tuned by the pseudo-resistor for selectively recording low field potentials (LFP) or extra cellular action potentials (EAP). The amplifier achieves a mid-band voltage gain of 37 dB and minimizes the attenuation of the signal from neuron to the gate of the input transistor. It is used in fully differential configuration to reject noise of bias circuitry and to achieve high PSRR.

FIELD EMISSION EFFICIENCY OF A CARBON NANOTUBE ARRAY UNDER PARASITIC NONLINEARITIES

Carbon Nanotubes (CNTs) grown on substrates are potential electron sources in field emission applications. Several studies have reported the use of CNTs in field emission devices, including field emission displays, X-ray tube, electron microscopes, cathode-ray lamps, etc. Also, in recent years, conventional cold field emission cathodes have been realized in micro-fabricated arrays for medical X-ray imaging. CNTbased field emission cathode devices have potential applications in a variety of industrial and medical applications, including cancer treatment. Field emission performance of a single isolated CNT is found to be remarkable, but the situation becomes complex when an array of CNTs is used. At the same time, use of arrays of CNTs is practical and economical. Indeed, such arrays on cathode substrates can be grown easily and their collective dynamics can be utilized in a statistical sense such that the average emission intensity is high enough and the collective dynamics lead to longer emission life. The authors in their previous publications had proposed a novel approach to obtain stabilized field emission current from a stacked CNT array of pointed height distribution. A mesoscopic modeling technique was employed, which took into account electro-mechanical forces in the CNTs, as well as transport of conduction electron coupled with electron phonon induced heat generation from the CNT tips. The reported analysis of pointed arrangements of the array showed that the current density distribution was greatly localized in the middle of the array, the scatter due to electrodynamic force field was minimized, and the temperature transients were much smaller compared to those in an array with random height distribution. In the present paper we develop a method to compute the emission efficiency of the CNT array in terms of the amount of electrons hitting the anode surface using trajectory calculations. Effects of secondary electron emission and parasitic capacitive nonlinearity on the current-voltage signals are accounted. Field emission efficiency of a stacked CNT array with various pointed height distributions are compared to that of arrays with random and uniform height distributions. Effect of this parasitic nonlinearity on the emission switch-on voltage is estimated by model based simulation and Monte Carlo method.

Observation of localized states in atomically thin MoS2 field effect transistor

We present electrical transport arid low frequency (1/f) noise measurements on mechanically exfoliated single, In and triLayer MoS2-based FPI devices on Si/SiO2 substrate. We find that tie electronic states hi MoS2 are localized at low temperatures (T) and conduction happens through variable range hopping (VRH). A steep increase of 1/f noise with decreasing T, typical for localized regime was observed in all of our devices. From gate voltage dependence of noise, we find that the noise power is inversely proportional to square of the number density (proportional to 1/n(2)) for a wide range of T, indicating number density fluctuations to be the dominant source of 1/f noise in these MoS2 FETs.