Bit-level systolic array implementation of the Winograd Fourier transform algorithm

A bit level systolic array system is proposed for the Winograd Fourier transform algorithm. The design uses bit-serial arithmetic and, in common with other systolic arrays, features nearest-neighbor interconnections, regularity and high throughput. The short interconnections in this method contrast favorably with the long interconnections between butterflies required in the FFT. The structure is well suited to VLSI implementations. It is demonstrated how long transforms can be implemented with components designed to perform a short length transform. These components build into longer transforms preserving the regularity and structure of the short length transform design.

A 64-point fourier transform chip for video motion compensation using phase correlation

Details of a new low power fast Fourier transform (FFT) processor for use in digital television applications are presented. This has been fabricated using a 0.6-µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-time video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8 × 8 mm and dissipates 1 W. The chip design is based on a novel VLSI architecture which has been derived from a first principles factorization of the discrete Fourier transform (DFT) matrix and tailored to a direct silicon implementation.

SYSTOLIC IMPLEMENTATION OF THE WINOGRAD FOURIER TRANSFORM ALGORITHM.

A bit-level systolic array system is proposed for the Winograd Fourier transform algorithm. The design uses bit-serial arithmetic and, in common with other systolic arrays, features nearest neighbor interconnections, regularity, and high throughput. The short interconnections in this method contrast favorably with the long interconnections between butterflies required in the FFT. The structure is well suited to VLSI implementations. It is demonstrated how long transforms can be implemented with components designed to perform short-length transforms. These components build into longer transforms, preserving the regularity and structure of the short-length transform design.

Discrete cosine transform generator for VLSI synthesis

A generator for the automated design of Discrete Cosine Transform (DCT) cores is presented. This can be used to rapidly create silicon circuits from a high level specification. These compare very favourably with existing designs. The DCT cores produced are scaleable in terms of point size as well as input/output and coefficient wordlengths. This provides a high degree of flexibility. An example, 8-point 1D DCT design, produced occupies less than 0.92 mm when implemented in a 0.35µ double level metal CMOS technology. This can be clocked at a rate of 100MHz.

Design and implementation of the symmetrically extended 2-D wavelet transform

The inclusion of the Discrete Wavelet Transform in the JPEG-2000 standard has added impetus to the research of hardware architectures for the two-dimensional wavelet transform. In this paper, a VLSI architecture for performing the symmetrically extended two-dimensional transform is presented. This architecture conforms to the JPEG-2000 standard and is capable of near-optimal performance when dealing with the image boundaries. The architecture also achieves efficient processor utilization. Implementation results based on a Xilinx Virtex-2 FPGA device are included.

Rapid VLSI design of biorthogonal wavelet transform cores

A rapid design methodology for biorthogonal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture for the wavelet filters. The architecture offers efficient hardware utilization by combining the linear phase property of biorthogonal filters with decimation in a MAC based implementation. The design has been captured in VHDL and parameterized in terms of wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. The design time to produce silicon layout of a biorthogonal wavelet based system is typically less than a day. The resulting silicon cores produced are comparable in area and performance to hand-crafted designs. The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Comparison of Wavelet Transform and Time-Domain Analysis of Second Trimester Uterine Artery Doppler Waveforms in Screening for Pre-Eclampsia

The aim of this study was to compare time-domain waveform analysis of second-trimester uterine artery Doppler using the resistance index (RI) with waveform analysis using a mathematical tool known as wavelet transform for the prediction of pre-eclampsia (PE). This was a retrospective, nested case-cohort study of 336 women, 37 of whom subsequently developed PE. Uterine artery Doppler waveforms were analysed using both RI and waveform analysis. The utility of these indices in screening for PE was then evaluated using receiver operating characteristic curves. There were significant differences in uterine artery RI between the PE women and those with normal pregnancy outcome. After wavelet analysis, significant difference in the mean amplitude in wavelet frequency band 4 was noted between the 2 groups. The sensitivity for both Doppler RI and frequency band 4 for the detection of PE at a 10% false-positive rate was 45%. This small study demonstrates the application of wavelet transform analysis of uterine artery Doppler waveforms in screening for PE. Further prospective studies are needed in order to clearly define if this analytical approach to waveform analysis may have the potential to improve the detection of PE by uterine artery Doppler screening.

Fourier Transform using a Rotman Lens

In this paper, the design constraints that are required for a Rotman lens to realize discrete Fourier transform (DFT) amplitude and phase functionality are derived. A Fourier Rotman lens has been designed, fabricated and validated. The amplitude and phase response and the array pattern based on the CST™ results are validated with the theoretical DFT results. To the best of the authors' knowledge, this is the first Fourier Rotman lens to be fabricated and validated. The solution provided replaces multilayer Butler matrix solutions with a simple single layer microstrip technology.

Forensic analysis of architectural finishes using fourier transform infrared and raman spectroscopy, part II:White paint

White household paints are commonly encountered as evidence in the forensic laboratory but they often cannot be readily distinguished by color alone so Fourier transform infrared (FT-IR) microscopy is used since it can sometimes discriminate between paints prepared with different organic resins. Here we report the first comparative study of FT-IR and Raman spectroscopy for forensic analysis of white paint. Both techniques allowed the 51 white paint samples in the study to be classified by inspection as either belonging to distinct groups or as unique samples. FT-IR gave five groups and four unique samples; Raman gave seven groups and six unique samples. The basis for this discrimination was the type of resin and/ or inorganic pigments/extenders present. Although this allowed approximately half of the white paints to be distinguished by inspection, the other half were all based on a similar resin and did not contain the distinctive modifiers/pigments and extenders that allowed the other samples to be identified. The experimental uncertainty in the relative band intensities measured using FT-IR was similar to the variation within this large group, so no further discrimination was possible. However, the variation in the Raman spectra was larger than the uncertainty, which allowed the large group to be divided into three subgroups and four distinct spectra, based on relative band intensities. The combination of increased discrimination and higher sample throughput means that the Raman method is superior to FT-IR for samples of this type. © 2005 Society for Applied Spectroscopy.

Using entropy based mean shift filter and modified watershed transform for grain segmentation

Life science research aims to continuously improve the quality and standard of human life. One of the major challenges in this area is to maintain food safety and security. A number of image processing techniques have been used to investigate the quality of food products. In this paper,we propose a new algorithm to effectively segment connected grains so that each of them can be inspected in a later processing stage. One family of the existing segmentation methods is based on the idea of watersheding, and it has shown promising results in practice.However,due to the over-segmentation issue,this technique has experienced poor performance in various applications,such as inhomogeneous background and connected targets. To solve this problem,we present a combination of two classical techniques to handle this issue.In the first step,a mean shift filter is used to eliminate the inhomogeneous background, where entropy is used to be a converging criterion. Secondly,a color gradient algorithm is used in order to detect the most significant edges, and a marked watershed transform is applied to segment cluttered objects out of the previous processing stages. The proposed framework is capable of compromising among execution time, usability, efficiency and segmentation outcome in analyzing ring die pellets. The experimental results demonstrate that the proposed approach is effectiveness and robust.

VEDA:Variation-aware energy-efficient discrete Wavelet Transform architecture

In this paper, we present a unified approach to an energy-efficient variation-tolerant design of Discrete Wavelet Transform (DWT) in the context of image processing applications. It is to be noted that it is not necessary to produce exactly correct numerical outputs in most image processing applications. We exploit this important feature and propose a design methodology for DWT which shows energy quality tradeoffs at each level of design hierarchy starting from the algorithm level down to the architecture and circuit levels by taking advantage of the limited perceptual ability of the Human Visual System. A unique feature of this design methodology is that it guarantees robustness under process variability and facilitates aggressive voltage over-scaling. Simulation results show significant energy savings (74% - 83%) with minor degradations in output image quality and avert catastrophic failures under process variations compared to a conventional design. © 2010 IEEE.