994 resultados para tri-gate transistor structure
Resumo:
In this work we have studied the radiation effects on MOSFET electronic devices. The integrated circuits were exposed to 10 key X-ray radiation and 2.6 MeV energy proton beam. We have irradiated MOSFET devices with two different geometries: rectangular-gate transistor and circular-gate transistor. We have observed the cumulative dose provokes shifts on the threshold voltage and increases or decreases the transistor's off-state and leakage current. The position of the trapped charges in modern CMOS technology devices depends on radiation type, dose rate, total dose, applied bias and is a function of device geometry. We concluded the circular-gate transistor is more tolerant to radiation than the rectangular-gate transistor. (C) 2011 Elsevier B.V. All rights reserved.
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In this work, the impact of global and/or local strain engineering techniques on tri-gate p- and nMuGFETs performance is experimentally evaluated. Multiple gate structures were analyzed through basic and analog performance parameters for four different splits processed with different strain-engineering techniques (unstrained, uniaxial, biaxial and uniaxial+biaxial stress). While n-channel devices with narrow fins present a worse analog behavior, biaxial stress promotes the electron mobility for larger devices increasing the voltage gain. Besides the voltage gain, the transconductance, output conductance and Early Voltage are also evaluated. Although pMuGFETs are less affected by the strain engineering, they present better analog behavior for all studied devices.
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Organic semiconductor technology has attracted considerable research interest in view of its great promise for large area, lightweight, and flexible electronics applications. Owing to their advantages in processing and unique physical properties, organic semiconductors can bring exciting new opportunities for broad-impact applications requiring large area coverage, mechanical flexibility, low-temperature processing, and low cost. In order to achieve highly flexible device architecture it is crucial to understand on a microscopic scale how mechanical deformation affects the electrical performance of organic thin film devices. Towards this aim, I established in this thesis the experimental technique of Kelvin Probe Force Microscopy (KPFM) as a tool to investigate the morphology and the surface potential of organic semiconducting thin films under mechanical strain. KPFM has been employed to investigate the strain response of two different Organic Thin Film Transistor with active layer made by 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-Pentacene), and Poly(3-hexylthiophene-2,5-diyl) (P3HT). The results show that this technique allows to investigate on a microscopic scale failure of flexible TFT with this kind of materials during bending. I find that the abrupt reduction of TIPS-pentacene device performance at critical bending radii is related to the formation of nano-cracks in the microcrystal morphology, easily identified due to the abrupt variation in surface potential caused by local increase in resistance. Numerical simulation of the bending mechanics of the transistor structure further identifies the mechanical strain exerted on the TIPS-pentacene micro-crystals as the fundamental origin of fracture. Instead for P3HT based transistors no significant reduction in electrical performance is observed during bending. This finding is attributed to the amorphous nature of the polymer giving rise to an elastic response without the occurrence of crack formation.
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There is an immediate need for identification of new antifungal targets in opportunistic pathogenic fungi like Candida albicans. In the past, efforts have focused on synthesis of chitin and glucan, which confer mechanical strength and rigidity upon the cell wall. This paper describes the molecular analysis of CaMNT1, a gene involved in synthesis of mannoproteins, the third major class of macromolecule found in the cell wall. CaMNT1 encodes an α-1,2-mannosyl transferase, which adds the second mannose residue in a tri-mannose oligosaccharide structure which represents O-linked mannan in C. albicans. The deduced amino acid sequence suggests that CaMnt1p is a type II membrane protein residing in a medial Golgi compartment. The absence of CaMnt1p reduced the ability of C. albicans cells to adhere to each other, to human buccal epithelial cells, and to rat vaginal epithelial cells. Both heterozygous and homozygous Camnt1 null mutants of C. albicans showed strong attenuation of virulence in guinea pig and mouse models of systemic candidosis, which, in guinea pigs, could be attributed to a decreased ability to reach and/or adhere internal organs. Therefore, correct CaMnt1p-mediated O-linked mannosylation of proteins is critical for adhesion and virulence of C. albicans.
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In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long channel cylindrical body structure. The potential distribution at each and every point of the of the wire is derived with a closed form solution of two dimensional Poisson's equation, which is then used to model the threshold voltage. Proposed model can be treated as a generalized model, which is valid for both surround gate and semi-surround gate cylindrical transistors. The accuracy of proposed model is verified for different device geometry against the results obtained from three dimensional numerical device simulators and close agreement is observed.
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For the first time, we report a new poly-Si stepped gate Thin Film Transistor (SG TFT) on glass. The Density of States extracted from measured I-V characteristics has been used to evaluate the device performance with a two dimensional device simulator. The results show that the three-terminal SG TFT device has a switching speed comparable to a low voltage structure and the high on-current capability of a metal field plate (MFP) TFT and the potential for comparable breakdown characteristics.
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This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.
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In this paper, we present the outcomes of a project on the exploration of the use of Field Programmable Gate Arrays(FPGAs) as co-processors for scientific computation. We designed a custom circuit for the pipelined solving of multiple tri-diagonal linear systems. The design is well suited for applications that require many independent tri diagonal system solves, such as finite difference methods for solving PDEs or applications utilising cubic spline interpolation. The selected solver algorithm was the Tri Diagonal Matrix Algorithm (TDMA or Thomas Algorithm). Our solver supports user specified precision thought the use of a custom floating point VHDL library supporting addition, subtraction, multiplication and division. The variable precision TDMA solver was tested for correctness in simulation mode. The TDMA pipeline was tested successfully in hardware using a simplified solver model. The details of implementation, the limitations, and future work are also discussed.
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In this paper, we present the outcomes of a project on the exploration of the use of Field Programmable Gate Arrays (FPGAs) as co-processors for scientific computation. We designed a custom circuit for the pipelined solving of multiple tri-diagonal linear systems. The design is well suited for applications that require many independent tri-diagonal system solves, such as finite difference methods for solving PDEs or applications utilising cubic spline interpolation. The selected solver algorithm was the Tri-Diagonal Matrix Algorithm (TDMA or Thomas Algorithm). Our solver supports user specified precision thought the use of a custom floating point VHDL library supporting addition, subtraction, multiplication and division. The variable precision TDMA solver was tested for correctness in simulation mode. The TDMA pipeline was tested successfully in hardware using a simplified solver model. The details of implementation, the limitations, and future work are also discussed.
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M r= 470.46, rhombohedral, R3, a =8.710(4)A, a=91.10(3) o, V= 660.4 (9) A 3, Z= 1,D m= 1.170 (flotation in KI solution), D x=1.183 Mg m -a, Mo Kct, 2 = 0.7107/~,, /t =0.033 mm -1, F(000) - 248.0, T= 293 K, R -- 4.6%(481 unique reflections). The molecule has C a symmetry and is propeller shaped, the angle of twist about the B-C bond being 41.5 (7) °. The space group being chiral, this is yet another example of spontaneous resolution. The results of a thermal-motion analysis are discussed.
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In this paper, a physically based analytical quantum linear threshold voltage model for short channel quad gate MOSFETs is developed. The proposed model, which is suitable for circuit simulation, is based on the analytical solution of 3-D Poisson and 2-D Schrodinger equation. Proposed model is fully validated against the professional numerical device simulator for a wide range of device geometries and also used to analyze the effect of geometry variation on the threshold voltage.
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The reactions of the mononuclear cyclodiphosphazane complexes, cis-[Mo(CO)(4){cis-[PhNP(OR)](2)}(2)] with [Mo(CO)(4)(nbd)] (nbd = norbornadiene). [Mo(CO)(4)(NHC5H10)(2)] or [MCl(2)(cod)] (cod = cycloocta-1,5-diene) afforded the homobimetallic complexes; [Mo-2(CO)(8){mu-cis-[PhNP(OR)](2)}(2)] (R = C(5)H(4)Me-p 5 or CH2CF3 6) or the heterobimetallic complexes. [Mo-2(CO)(8){mu-cis-[PhNP(OE)](2)}(2)MCl(2)] (R = C(6)H(4)Me-p; M = Pd 7 or Pt 8). In all the above complexes, the two metal moieties are bridged by two cyclodiphosphazane ligands. The reactions of the mononuclear complexes, cis-[M(CO)(4)(A){cis-[PhNP(OC(6)H(4)Me-p)](2)}] with (M'Cl-2(cod)] afforded the trinuclear complexes, cis-[M'Cl-2[M(CO)(4)(A){cis-[PhNP(OC(6)H(4)Me-p)](2)}](2)] (M' = Pd, M = Mo, A = P(OMe)(3) 10; M' = Pt, M = Mo. A = P(OMe)(3) 11; M' = Pd. M = W. A = NHC5H10 12; M' = Pt, M = W. A = NHC5H10 13). The structure of the complex 5 has been determined by single-crystal X-ray crystallography.