Voltage and Temperature-Aware SSTA Using Neural Network Delay Model

With the emergence of voltage scaling as one of the most powerful power reduction techniques, it has been important to support voltage scalable statistical static timing analysis (SSTA) in deep submicrometer process nodes. In this paper, we propose a single delay model of logic gate using neural network which comprehensively captures process, voltage, and temperature variation along with input slew and output load. The number of simulation programs with integrated circuit emphasis (SPICE) required to create this model over a large voltage and temperature range is found to be modest and 4x less than that required for a conventional table-based approach with comparable accuracy. We show how the model can be used to derive sensitivities required for linear SSTA for an arbitrary voltage and temperature. Our experimentation on ISCAS 85 benchmarks across a voltage range of 0.9-1.1V shows that the average error in mean delay is less than 1.08% and average error in standard deviation is less than 2.85%. The errors in predicting the 99% and 1% probability point are 1.31% and 1%, respectively, with respect to SPICE. The two potential applications of voltage-aware SSTA have been presented, i.e., one for improving the accuracy of timing analysis by considering instance-specific voltage drops in power grids and the other for determining optimum supply voltage for target yield for dynamic voltage scaling applications.

Photoresist functionalisation method for high-density protein microarrays using photolithography

Since the last decade, there is a growing need for patterned biomolecules for various applications ranging from diagnostic devices to enabling fundamental biological studies with high throughput. Protein arrays facilitate the study of protein-protein, protein-drug or protein-DNA interactions as well as highly multiplexed immunosensors based on antibody-antigen recognition. Protein microarrays are typically fabricated using piezoelectric inkjet printing with resolution limit of similar to 70-100 mu m limiting the array density. A considerable amount of research has been done on patterning biomolecules using customised biocompatible photoresists. Here, a simple photolithographic process for fabricating protein microarrays on a commercially available diazo-naphthoquinone-novolac-positive tone photoresist functionalised with 3-aminopropyltriethoxysilane is presented. The authors demonstrate that proteins immobilised using this procedure retain their activity and therefore form functional microarrays with the array density limited only by the resolution of lithography, which is more than an order of magnitude compared with inkjet printing. The process described here may be useful in the integration of conventional semiconductor manufacturing processes with biomaterials relevant for the creation of next-generation bio-chips.

Effect of Process Deviations on Performance of Piezoresistive Pressure Sensors

Diaphragm thickness and the corresponding piezoresistor locations change due to over or under etching in bulk micromachined piezoresistive pressure sensor which intern influences the device performance. In the present work, variation of sensitivity and nonlinearity of a micro electro mechanical system low pressure sensor is investigated. The sensor is modeled using finite element method to analyze the variation of sensitivity and nonlinearity with diaphragm thickness. To verify the simulated results, the sensors with different diaphragm thicknesses are fabricated. The models are verified by comparing the calculated results with experimental data. This study is potentially useful for the researchers as most of the times the diaphragm is either over-etched or under-etched due to inherent variation in wafer thickness and involving manual operations.

Direct chemical vapor deposition of large-area carbon thin films on gallium nitride for transparent electrodes: A first attempt

Direct formation of large-area carbon thin films on gallium nitride by chemical vapor deposition without metallic catalysts is demonstrated. A high flow of ammonia is used to stabilize the surface of the GaN (0001)/sapphire substrate during the deposition at 950°C. Various characterization methods verify that the synthesized thin films are largely sp 2 bonded, macroscopically uniform, and electrically conducting. The carbon thin films possess optical transparencies comparable to that of exfoliated graphene. This paper offers a viable route toward the use of carbon-based materials for future transparent electrodes in III-nitride optoelectronics, such as GaN-based light emitting diodes and laser diodes. © 1988-2012 IEEE.

Low-cost high-efficiency GaN LED on large-area si substrate

The use of large size Si substrates for epitaxy of nitride light emitting diode (LED) structures has attracted great interest because Si wafers are readily available in large diameter at low cost. In addition, such wafers are compatible with existing processing lines for the 6-inch and larger wafer sizes commonly used in the electronics industry. With the development of various methods to avoid wafer cracking and reduce the defect density, the performance of GaN-based LED and electronic devices has been greatly improved. In this paper, we review our methods of growing crack-free InGaN-GaN multiple quantum well (MQW) LED structures of high crystalline quality on Si(111) substrates. The performance of processed LED devices and its dependence on the threading dislocation density were studied. Full wafer-level LED processing using a conventional 6-inch III-V processing line is also presented, demonstrating the great advantage of using large-size Si substrates for mass production of GaN LED devices.

Max separation clustering for feature extraction from Optical Emission Spectroscopy Data

This paper proposes max separation clustering (MSC), a new non-hierarchical clustering method used for feature extraction from optical emission spectroscopy (OES) data for plasma etch process control applications. OES data is high dimensional and inherently highly redundant with the result that it is difficult if not impossible to recognize useful features and key variables by direct visualization. MSC is developed for clustering variables with distinctive patterns and providing effective pattern representation by a small number of representative variables. The relationship between signal-to-noise ratio (SNR) and clustering performance is highlighted, leading to a requirement that low SNR signals be removed before applying MSC. Experimental results on industrial OES data show that MSC with low SNR signal removal produces effective summarization of the dominant patterns in the data.

Long-Range Lateral Dopant Diffusion in Tungsten Silicide Layers

Novel diode test structures have been manufactured to characterize long-range dopant diffusion in tungsten silicide layers. A tungsten silicide to p-type silicon contact has been characterized as a Schottky barrier rectifying contact with a silicide work function of 4.8 eV. Long-range diffusion of boron for an anneal at 900 °C for 30 min has been shown to alter this contact to become ohmic. Long-range diffusion of phosphorus with a similar anneal alters the contact to become a bipolar n-p diode. Bipolar diode action is demonstrated experimentally for anneal schedules of 30 min at 900 °C, indicating long-range diffusion of phosphorus (~38 µm), SIMS analysis shows dopant redistribution is adversely affected by segregation to the silicide/oxide interface. The concept of conduit diffusion has been demonstrated experimentally for application in advanced bipolar transistor technology. © 2009 IEEE.

Virtual metrology enabled early stage prediction for enhanced control of multi-stage fabrication processes

Semiconductor fabrication involves several sequential processing steps with the result that critical production variables are often affected by a superposition of affects over multiple steps. In this paper a Virtual Metrology (VM) system for early stage measurement of such variables is presented; the VM system seeks to express the contribution to the output variability that is due to a defined observable part of the production line. The outputs of the processed system may be used for process monitoring and control purposes. A second contribution of this work is the introduction of Elastic Nets, a regularization and variable selection technique for the modelling of highly-correlated datasets, as a technique for the development of VM models. Elastic Nets and the proposed VM system are illustrated using real data from a multi-stage etch process used in the fabrication of disk drive read/write heads. © 2013 IEEE.

A predictive maintenance system for integral type faults based on support vector machines:An application to ion implantation

In semiconductor fabrication processes, effective management of maintenance operations is fundamental to decrease costs associated with failures and downtime. Predictive Maintenance (PdM) approaches, based on statistical methods and historical data, are becoming popular for their predictive capabilities and low (potentially zero) added costs. We present here a PdM module based on Support Vector Machines for prediction of integral type faults, that is, the kind of failures that happen due to machine usage and stress of equipment parts. The proposed module may also be employed as a health factor indicator. The module has been applied to a frequent maintenance problem in semiconductor manufacturing industry, namely the breaking of the filament in the ion-source of ion-implantation tools. The PdM has been tested on a real production dataset. © 2013 IEEE.

A dynamic sampling methodology for plasma etch processes using Gaussian process regression

Plasma etch is a key process in modern semiconductor manufacturing facilities as it offers process simplification and yet greater dimensional tolerances compared to wet chemical etch technology. The main challenge of operating plasma etchers is to maintain a consistent etch rate spatially and temporally for a given wafer and for successive wafers processed in the same etch tool. Etch rate measurements require expensive metrology steps and therefore in general only limited sampling is performed. Furthermore, the results of measurements are not accessible in real-time, limiting the options for run-to-run control. This paper investigates a Virtual Metrology (VM) enabled Dynamic Sampling (DS) methodology as an alternative paradigm for balancing the need to reduce costly metrology with the need to measure more frequently and in a timely fashion to enable wafer-to-wafer control. Using a Gaussian Process Regression (GPR) VM model for etch rate estimation of a plasma etch process, the proposed dynamic sampling methodology is demonstrated and evaluated for a number of different predictive dynamic sampling rules. © 2013 IEEE.

Optimal wafer site selection using forward selection component analysis

Reducing wafer metrology continues to be a major target in semiconductor manufacturing efficiency initiatives due to it being a high cost, non-value added operation that impacts on cycle-time and throughput. However, metrology cannot be eliminated completely given the important role it plays in process monitoring and advanced process control. To achieve the required manufacturing precision, measurements are typically taken at multiple sites across a wafer. The selection of these sites is usually based on a priori knowledge of wafer failure patterns and spatial variability with additional sites added over time in response to process issues. As a result, it is often the case that in mature processes significant redundancy can exist in wafer measurement plans. This paper proposes a novel methodology based on Forward Selection Component Analysis (FSCA) for analyzing historical metrology data in order to determine the minimum set of wafer sites needed for process monitoring. The paper also introduces a virtual metrology (VM) based approach for reconstructing the complete wafer profile from the optimal sites identified by FSCA. The proposed methodology is tested and validated on a wafer manufacturing metrology dataset. © 2012 IEEE.