Low voltage four-quadrant current multiplier: An improved topology for n-well CMOS process

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Low voltage analog synthesizer of orthogonal signals: A current-mode approach

An analog synthesizer of orthogonal signals for digital CMOS technology and 3V supply voltage is presented. The adaptive architecture accomplishes the synthesis of mutually orthogonal signal, such as trigonometric and polynomial basis. Experimental results using 0.35 mu m AMS CMOS process are presented for generation of the cosine and Legendre basis.

Low voltage analog synthesizer of orthogonal signals using current mode techniques

An analog synthesizer of orthogonal signals for digital CMOS technology and 3V supply voltage is presented. The adaptive architecture accomplishes the synthesis of mutually orthogonal signal, such as trigonometric and polynomial basis. Simulation results using 0.35 mu m AMS CMOS process are presented for generation of the cosine and Legendre basis.

Low voltage four-quadrant current multiplier: an improved topology for n-well CMOS process

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A low-voltage wide-swing programmable-gain current amplifier

A CMOS low-voltage, wide-swing continuous-time current amplifier is presented. Exhibiting an open-loop architecture, the circuit is composed of transresistance and transconductance stages built upon triode-operating transistors. In addition to an extended dynamic range, the current gain can be programmed within good accuracy by a rapport involving only transistor geometries and tuning biases. Low temperature-drift on gain setting is then expected.In accordance with a 0.35 mum n-well CMOS fabrication process and a single 1.1 V-supply, a balanced current-amplifier is designed for a programmable gain-range of 6 - 34 dB and optimized with respect to dynamic range. Simulated results from PSPICE and Bsim3v3 models indicate, for a 100 muA(pp)-output current, a THD of 0.96 and 1.87% at 1 KHz and 100 KHz, respectively. Input noise is 120 pArootHz @ 10 Hz, with S/N = 63.2 dB @ 1%-THD. At maximum gain, total quiescent consumption is 334 muW. Measurements from a prototyped amplifier reveal a gain-interval of 4.8-33.1 dB and a maximum current swing of 120 muA(pp). The current-amplifier bandwidth is above 1 MHz.

A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

A low-voltage programmable-gain current-mode amplifier

A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.

Power Electronics Didactic Modules for Direct Current Machine Control

Several didactic modules for an electric machinery laboratory are presented. The modules are dedicated for DC machinery control and get their characteristic curves. The didactic modules have a front panel with power and signal connectors and can be configurable for any DC motor type. The three-phase bridge inverter proposed is one of the most popular topologies and is commercially available in power package modules. The control techniques and power drives were designed to satisfy static and dynamic performance of DC machines. Each power section is internally self-protected against misconnections and short-circuits. Isolated output signals of current and voltage measurements are also provided, adding versatility for use either in didactic or research applications. The implementation of such modules allowed experimental confirmation of the expected performance.

Low power low voltage quadrature RC oscillators for modern RF receivers

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology.

Identification of Some Additional Loss Components in High-Power Low-Voltage Permanent Magnet Generators

Permanent magnet generators (PMG) represent the cutting edge technology in modern wind mills. The efficiency remains high (over 90%) at partial loads. To improve the machine efficiency even further, every aspect of machine losses has to be analyzed. Additional losses are often given as a certain percentage without providing any detailed information about the actual calculation process; meanwhile, there are many design-dependent losses that have an effect on the total amount of additional losses and that have to be taken into consideration. Additional losses are most often eddy current losses in different parts of the machine. These losses are usually difficult to calculate in the design process. In this doctoral thesis, some additional losses are identified and modeled. Further, suggestions on how to minimize the losses are given. Iron losses can differ significantly between the measured no-load values and the loss values under load. In addition, with embedded magnet rotors, the quadrature-axis armature reaction adds losses to the stator iron by manipulating the harmonic content of the flux. It was, therefore, re-evaluated that in salient pole machines, to minimize the losses and the loss difference between the no-load and load operation, the flux density has to be kept below 1.5 T in the stator yoke, which is the traditional guideline for machine designers. Eddy current losses may occur in the end-winding area and in the support structure of the machine, that is, in the finger plate and the clamping ring. With construction steel, these losses account for 0.08% of the input power of the machine. These losses can be reduced almost to zero by using nonmagnetic stainless steel. In addition, the machine housing may be subjected to eddy current losses if the flux density exceeds 1.5 T in the stator yoke. Winding losses can rise rapidly when high frequencies and 10–15 mm high conductors are used. In general, minimizing the winding losses is simple. For example, it can be done by dividing the conductor into transposed subconductors. However, this comes with the expense of an increase in the DC resistance. In the doctoral thesis, a new method is presented to minimize the winding losses by applying a litz wire with noninsulated strands. The construction is the same as in a normal litz wire but the insulation between the subconductors has been left out. The idea is that the connection is kept weak to prevent harmful eddy currents from flowing. Moreover, the analytical solution for calculating the AC resistance factor of the litz-wire is supplemented by including an end-winding resistance in the analytical solution. A simple measurement device is developed to measure the AC resistance in the windings. In the case of a litz-wire with originally noninsulated strands, vacuum pressure impregnation (VPI) is used to insulate the subconductors. In one of the two cases studied, the VPI affected the AC resistance factor, but in the other case, it did not have any effect. However, more research is needed to determine the effect of the VPI on litz-wire with noninsulated strands. An empirical model is developed to calculate the AC resistance factor of a single-layer formwound winding. The model includes the end-winding length and the number of strands and turns. The end winding includes the circulating current (eddy currents that are traveling through the whole winding between parallel strands) and the main current. The end-winding length also affects the total AC resistance factor.

Low voltage and variable-pressure scanning electron microscopy of fractured composites

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.

Low voltage electroluminescence of terbium- and thulium-doped zinc oxide films

Strong interest in developing technology for visual information. stimulates research for thin film electroluminescent devices. Here, for the first time, we report that thulium- and terbium-doped zinc-oxide films are suitable for electroluminescence applications. Two different devices were assembled as lTO/LiF/ZnO:RE/LiF/Al or ITO/SiO2/ZnO:RE/SiO2/Al, where ZnO:RE is a film of zinc oxide containing 10 at% of Tb3+ or Tm3+. Electroluminescence spectra show that besides a broad emission band with maximum around 650 nm assigned to ZnO, also emission lines from Tb3+ at 484 nm (D-5(4) -> F-7(6)), 543 nm (D-5(4) -> F-7(6)), and 589 nm (D-5(4) -> F-7(4)), or from Tm3+ at 478 nm ((1)G(4) -> H-3(6)), and 511 mn (D-1(2) -> H-3(5)) were detected. Intensity of emission as function of applied voltage and current-voltage characteristic are shown and discussed. (c) 2005 Elsevier B.V. All rights reserved.

The effect of TiO(2) on the microstructural and electrical properties of low voltage varistor based on (Sn,Ti)O(2) ceramics

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)