Parametric analog signal amplification applied to nanoscale cmos wireless digital transceivers

Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering by the Universidade Nova de Lisboa,Faculdade de Ciências e Tecnologia

Reference-free high-speed cmos pipeline analog-to-digital converters

Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering of the Faculdade de Ciências e Tecnologia of Universidade Nova de Lisboa

An RF LC Q-enhanced CMOS iter using integrated inductors with layout optimization

Dissertação apresentada para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores, pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

Transreceptor de faixa larga baseado em impulso de rádio para sensor sem fios de curta distância implementado em tecnologia CMOS

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores

A low-voltage RF-CMOS receiver front-end for a wireless fall detection microsystem

Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e de Computadores, pela Universidade Nova de Ciências e Tecnologia

CMOS indoor light energy harvesting system for wireless sensing applications

Dissertação para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores

Design of a CMOS amplifier for breast cancer detection

A transimpedance amplifier (TIA) is used, in radiation detectors like the positron emission tomography(PET), to transform the current pulse produced by a photo-sensitive device into an output voltage pulse with a desired amplitude and shape. The TIA must have the lowest noise possible to maximize the output. To achieve a low noise, a circuit topology is proposed where an auxiliary path is added to the feedback TIA input, In this auxiliary path a differential transconductance block is used to transform the node voltage in to a current, this current is then converted to a voltage pulse by a second feedback TIA complementary to the first one, with the same amplitude but 180º out of phase with the first feedback TIA. With this circuit the input signal of the TIA appears differential at the output, this is used to try an reduced the circuit noise. The circuit is tested with two different devices, the Avalanche photodiodes (APD) and the Silicon photomultiplier (SIPMs). From the simulations we find that when using s SIPM with Rx=20kΩ and Cx=50fF the signal to noise ratio is increased from 59 when using only one feedback TIA to 68.3 when we use an auxiliary path in conjunction with the feedback TIA. This values where achieved with a total power consumption of 4.82mv. While the signal to noise ratio in the case of the SIPM is increased with some penalty in power consumption.

A piezoelectric based energy harvester interface for a CMOS wireless sensor IC

In this thesis a piezoelectric energy harvesting system, responsible for regulating the power output of a piezoelectric transducer subjected to ambient vibration, is designed to power an RF receiver with a 6 mW power consump-tion. The electrical characterisation of the chosen piezoelectric transducer is the starting point of the design, which subsequently presents a full-bridge cross-coupled rectifier that rectifies the AC output of the transducer and a low-dropout regulator responsible for delivering a constant voltage system output of 0.6 V, with low voltage ripple, which represents the receiver’s required sup-ply voltage. The circuit is designed using CMOS 130 nm UMC technology, and the system presents an inductorless architecture, with reduced area and cost. The electrical simulations run for the complete circuit lead to the conclusion that the proposed piezoelectric energy harvesting system is a plausible solution to power the RF receiver, provided that the chosen transducer is subjected to moderate levels of vibration.

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology.

Wideband CMOS low noise amplifiers

Modern fully integrated receiver architectures, require inductorless circuits to achieve their potential low area, low cost, and low power. The low noise amplifier (LNA), which is a key block in such receivers, is investigated in this thesis. LNAs can be either narrowband or wideband. Narrowband LNAs use inductors and have very low noise figure, but they occupy a large area and require a technology with RF options to obtain inductors with high Q. Recently, wideband LNAs with noise and distortion cancelling, with passive loads have been proposed, which can have low NF, but have high power consumption. In this thesis the main goal is to obtain a very low area, low power, and low-cost wideband LNA. First, it is investigated a balun LNA with noise and distortion cancelling with active loads to boost the gain and reduce the noise figure (NF). The circuit is based on a conventional balun LNA with noise and distortion cancellation, using the combination of a common-gate (CG) stage and common-source (CS) stage. Simulation and measurements results, with a 130 nm CMOS technology, show that the gain is enhanced by about 3 dB and the NF is reduced by at least 0.5 dB, with a negligible impact on the circuit linearity (IIP3 is about 0 dBm). The total power dissipation is only 4.8 mW, and the active area is less than 50 x 50 m2 . It is also investigated a balun LNA in which the gain is boosted by using a double feedback structure.We propose to replace the load resistors by active loads, which can be used to implement local feedback loops (in the CG and CS stages). This will boost the gain and reduce the noise figure (NF). Simulation results, with the same 130 nm CMOS technology as above, show that the gain is 24 dB and NF is less than 2.7 dB. The total power dissipation is only 5.4 mW (since no extra blocks are required), leading to a figure-of-merit (FoM) of 3.8 mW

Implementação de um sistema MPPT em circuito integrado CMOS

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

Caracterització d'oscil·ladors basats en CMOS-M/NEMS i la seva aplicació com a sensors de massa

El present projecte tracta sobre la caracterització d'oscil·ladors basats en ressonadors micro/nanoelectromecànics (M/NEMS) i la seva aplicació com a sensors de massa. Els oscil·ladors utilitzats es basen en un pont i una palanca ressoants M/NEMS, integrats en tecnologia CMOS. En primer lloc s'ha fet una introducció teòrica als conceptes utilitzats per a entendre el funcionament i la caracterització dels dispositius. A continuació s'han realitzat proves per tal de caracteritzar els paràmetres importants per a l'ús dels oscil·ladors com a sensors de massa, com la seva estabilitat en freqüència. Per acabar s'han aplicat aquests sensors en la caracterització i modelització del flux de massa a través d'obertures de dimensions micromètriques.

Implementação de um Sistema MPPT em Circuito Integrado CMOS

Ao longo dos últimos anos a indústria microelectrónica tem evoluído no sentido de reduzir o consumo energético dos seus dispositivos no sentido de estes serem alimentados por fontes energéticas diversas, nomeadamente fontes renováveis. A crescente demanda por componentes energeticamente eficientes e pela miniaturização dos componentes eletrónicos exigem a conceção de fontes de alimentação com potência reduzida na ordem das dezenas de μW ás centenas de mW. Atualmente, com os crescentes avanços tecnológicos é possível obter componentes energéticamente eficientes e com tamanhos reduzidos capazes de colmatar as restrições energéticas das mais variadas aplicações. A utilização de fontes energia elétrica que tirão proveito da energia existente no meio onde se inserem os diversos dispositivos eletrónicos ou simplesmente para recarregar as baterias, apresenta-se como um dos principais objetivos a alcançar. Entre todas as energias renováveis, a energia fotovoltaica surge como umas das que proporciona um maior potencial. A sua disponibilidade global e os constantes desenvolvimentos tecnológicos no âmbito do fotovoltaico permitem o desenvolvimento de sistemas de alimentação com rendimento energético cada vez mais elevado. A presente dissertação tem como objetivo o estudo, a simulação e implementação de um conversor CC-CC, step-up, com algoritmo de controlo MPPT integrado designado por método de correlação de ripple (Ripple Correlation Control – RCC), para aplicações de baixa potência na ordem das dezenas de μW às centenas de mW. Desenvolveu-se um conversor CC-CC, autónomo, para carregamento de baterias com recurso a painéis fotovoltaicos, como fonte de energia, de forma contínua mesmo em situações de baixa luminosidade. Um circuito de gestão de energia devidamente dimensionado foi implementado com recurso a um algoritmo de procura do ponto de máxima potência (Maximum Power Point Tracking – MPPT). O objetivo desta implementação é extrair a máxima potência disponível da fonte de energia elétrica, neste caso o painel fotovoltaico, independentemente das condições meteorológicas e da potência requerida pela carga, sendo o excesso de energia redirecionado para a bateria. Nesta dissertação apresentam-se os resultados das simulações, assim como os resultados experimentais de todos os circuitos desenvolvidos de forma a validar todo o sistema implementado.