An RF LC Q-enhanced CMOS iter using integrated inductors with layout optimization


Autoria(s): Almeida, Pedro Daniel Manta de
Contribuinte(s)

Fino, Maria Helena

Data(s)

11/09/2013

11/09/2013

2013

Resumo

Dissertação apresentada para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores, pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

The advancement of CMOS technology led to the integration of more complex functions in a single chip. In the particular of wireless transceivers, integrated LC tanks are becoming popular both for VCOs and integrated lters. The design of a 2nd order CMOS 0.13 m Q-enhanced integrated LC lter for a frequency of 2.44 GHz is presented. The intent of this lter is to create a circuit for integrated wireless receiver and minimize the requirement for o -chip passive lter components, reducing the overall component count and size of wireless devices and systems. For RF applications the main challenge is still the design of integrated inductors with the maximum quality factor. For that purpose, tapered, i.e, variable width inductors have been introduced in the literature. In this work, a characterization of variable width integrated inductors is proposed. This inductor model is then integrated into an optimization procedure where inductors with a quality factor improvement are obtained.

Identificador

http://hdl.handle.net/10362/10393

Idioma(s)

eng

Publicador

Faculdade de Ciências e Tecnologia

Direitos

openAccess

Palavras-Chave #Inductor layout optimization #Variable metal width #Integrated RF inductor #Q-enhanced RF LC iter
Tipo

masterThesis