951 resultados para Input Power


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With a crystal orientation dependent on the etch rate of Si in KOH-based solution, a base-emitter self-aligned large-area multi-linger configuration power SiGe heterojunction bipolar transistor (HBT) device (with an emitter area of about 880 mu m(2)) is fabricated with 2 mu m double-mesa technology. The maximum dc current gain is 226.1. The collector-emitter junction breakdown voltage BVCEO is 10 V and the collector-base junction breakdown voltage BVCBO is 16 V with collector doping concentration of 1 x 10(17) cm(-3) and thickness of 400 nm. The device exhibited a maximum oscillation frequency f(max) of 35.5 GHz and a cut-off frequency f(T) of 24.9 GHz at a dc bias point of I-C = 70 mA and the voltage between collector and emitter is V-CE = 3 V. Load pull measurements in class-A operation of the SiGe HBT are performed at 1.9 GHz with input power ranging from 0 dBm to 21 dBm. A maximum output power of 29.9 dBm (about 977 mW) is obtained at an input power of 18.5 dBm with a gain of 11.47 dB. Compared to a non-self-aligned SiGe HBT with the same heterostructure and process, f(max) and f(T) are improved by about 83.9% and 38.3%, respectively.

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The paper proposes a high efficiency RFID UHF power converter unit to overcome the low efficiency problem. This power converter is mainly composed of an RF-DC converter and a DC-DC converter. In order to overcome the low efficiency problem in low current consuming condition, a DC-DC converter is added to conventional single RF-DC converter rectifier to increase the rectifying efficiency of the RFDC rectifier. The power converter is implemented in a 0.18 um mixed signal, 1p6m CMOS technology. Simulation shows the power converter has an average improvement of 5% and can achieve efficiency as high as 30% with 900MHz, 16uW RF input power and 1.3 V 3.6uA DC output.

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Argon gas with simple atomic structure and favorite arcing stability at low input power was used as the propellant. The thruster with a regeneratively cooled nozzle were tested in a vacuum system capable of keeping the chamber pressure at about 10 Pa at a propellant feeding rate of 5 slm. Arc current, arc voltage, thrust, nozzle temperature and propellant feeding rate were measured in situ simultaneously. Effects of the working parameters such as the propellant feeding rate and arc current on the thruster performances, mainly the produced thrust, specific impulse and thrust efficiency, were examined. The variation of arc volt-ampere characteristics with running time and the effect of nozzle temperature on thruster property are discussed.

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An experimental investigation of the argon plasma behavior near the E-H transition in an inductively coupled Gaseous Electronics Conference reference cell is reported. Electron density and temperature, ion density, argon metastable density, and optical emission measurements have been made as function of input power and gas pressure. When plotted versus plasma power, applied power corrected for coil and hardware losses, no hysteresis is observed in the measured plasma parameter dependence at the E-H mode transition. This suggests that hysteresis in the E-H mode transition is due to ignoring inherent power loss, primarily in the matching system.

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From the instantaneous efficiency plot, it is observed that the conventional 2-stage Doherty power amplifier (DPA) with high upper power dynamic range (>12 dB) suffers from a substantial dip in the middle of the upper power regime, thus reducing the average efficiency. In this study, an envelope-tracking-based DPA is proposed in order to minimise this dip by adjusting the drain bias voltage of the auxiliary amplifier of the DPA proportional to the input power level.

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The development of 5G enabling technologies brings new challenges to the design of power amplifiers (PAs). In particular, there is a strong demand for low-cost, nonlinear PAs which, however, introduce nonlinear distortions. On the other hand, contemporary expensive PAs show great power efficiency in their nonlinear region. Inspired by this trade-off between nonlinearity distortions and efficiency, finding an optimal operating point is highly desirable. Hence, it is first necessary to fully understand how and how much the performance of multiple-input multiple-output (MIMO) systems deteriorates with PA nonlinearities. In this paper, we first reduce the ergodic achievable rate (EAR) optimization from a power allocation to a power control problem with only one optimization variable, i.e. total input power. Then, we develop a closed-form expression for the EAR, where this variable is fixed. Since this expression is intractable for further analysis, two simple lower bounds and one upper bound are proposed. These bounds enable us to find the best input power and approach the channel capacity. Finally, our simulation results evaluate the EAR of MIMO channels in the presence of nonlinearities. An important observation is that the MIMO performance can be significantly degraded if we utilize the whole power budget.

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In order to provide a low cost system of thermal comfort, a common model of home fan, 40 cm diameter size, had its manual four-button control system replaced by an automatic speed control. The new control system has a temperature sensor feeding a microcontroller that, by using an optic coupling, DIAC or TRIAC-based circuit, varies the RMS value of the fan motor input voltage and its speed, according to the room temperature. Over a wide range of velocity, the fan net power and the motor fan input power were measured working under both control system. The temperature of the motor stator and the voltage waveforms were observed too. Measured values analysis showed that the TRIAC-based control system makes the fan motor work at a very low power factor and efficiency values. The worst case is at low velocity range where the higher fan motor stator temperatures were registered. The poor power factor and efficiency and the harmonics signals inserted in the motor input voltage wave by the TRIAC commutation procedure are correlated.

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This paper presents a new single-phase interleaved high power factor boost pre-regulator operating in critical conduction mode, where the switches and boost diode performing zero-current commutations during its turn-off, eliminating the disadvantages related to the reverse recovery losses and electromagnetic interference problems of the boost diode, when operating in the continuous conduction mode. The interleaving technique is applied in the power cell, providing a significant input current ripple reduction in comparison to discontinuous mode of operation, due to its input current continuous conduction operation. This paper presents a complete modeling for the converter operating in critical conduction mode, resulting in an improved design procedure for interleaved techniques with high input power factor, a complete design procedure, and main simulation results from a design example with two interleaved cells rated at 1kW, 400V output voltage and 220V rms input voltage.

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A Summary of different topological arrangements concerning a ZCS-PWM cell is presented, based on the analysis of its application in boost rectifying preregulators, controlled by the technique of instantaneous average values of input current, with the purpose of obtaining high-input-power-factor rectifier and high efficiency in single-phase applications in telecommunication systems. The main characteristics of each switching cell are described, providing conditions to establish a qualitative comparison among the structures. In addition, experimental results are presented for a prototype of the latest version of the ZCS-PWM boost rectifier, implemented for processing normal values of 1200 W output power and 400 V output average voltage, at 220 V Input RMS voltage and 50 kHz switching frequency.

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This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of de-to-de ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic. and Zeta converters. The novel ac-to-dc ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell, In order to minimize the harmonic contents of the input current, increasing the ac power factor, the average-current-mode control is used, obtaining preregulators with ac power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V(rms) input voltage, 400 V(dc) output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0,99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load, the new ZCS-PWM Zeta preregulator was designed to voltage step-down operation, and the experimental results were obtained from a laboratory prototype rated at 500 W, 220 V(rm), input voltage, 110 V(dc) output voltage, and operating at 50 kHz. The measured efficiency of the new ZCS-PWM Zeta preregulator is approximately 96.9% and the input power factor is 0.98, with an input current THD equal to 19.07% while the input voltage THD is equal to 1.96%, at rated load.

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This paper presents a dimmable electronic ballast designed for multiple fluorescent lamps applications. A ZCS-PWM Boost rectifier and a classical resonant Full-Bridge inverter compose this new electronic ballast, providing conditions for the obtaining of high input power-factor, and soft-switching processes for all semiconductor devices employed in the structure. The instantaneous average input current control technique is employed in the Boost rectifier. Concerning the Full-Bridge inverter, it is controlled by the imposition of phase-shift in the current processed through the sets of resonant filters + lamps, according to an adaptation in a specially designed control IC, called IR2159. Experimental results are presented in order to validate the analyses developed in this paper.

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A novel hybrid three-phase rectifier is proposed. It is capable to achieve high input power factor (PF) and low total harmonic input currents distortion (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase six-pulse diode rectifier (Graetz bridge) with a parallel connection of single-phase Sepic rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this work describes its principles, with detailed operation, simulation, experimental results, and discussions on power rating of the required Sepic converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Sepic converters, making the proposed solution economically viable for very high power installations, with fast investment payback. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing dc-link. A prototype has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly implemented in higher power applications.

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The authors present an offline switching power supply with multiple isolated outputs and unity power factor with the use of only one power processing stage, based on the DC-DC SEPIC (single ended primary inductance converter) modulated by variable hysteresis current control. The principle of operation, the theoretical analysis, the design procedure, an example, and simulation results are presented. A laboratory prototype, rated at 160 W, operating at a maximum switching frequency of 100 kHz, with isolated outputs rated at +5 V/15 A -5 V/1 A, +12 V/6 A and -12 V/1 A, has been built given an input power factor near unity.

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This work presents a new high power factor three-phase rectifier based on a Y-connected differential autotransformer with reduced kVA and 18-pulse input current followed by three DC-DC boost converters. The topology provides a regulated output voltage and natural three-phase input power factor correction. The lowest input current harmonic components are the 17th and the 19th. Three boost converters, with constant input currents and regulated parallel connected output voltages are used to process 4kW each one. Analytical results from Fourier analyses of winding currents and the vector diagram of winding voltages are presented. Simulation results to verify the proposed concept and experimental results are shown in the paper.

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This paper presents a new pre-regulator boost operating in the boundary area between the continuous and discontinuous conduction modes of the boost inductor current, where the switches and boost diode performing zero-current commutations during its turn-off, eliminating the disadvantages related to the reverse recovery losses and electromagnetic interference problems of the boost diode when operating in the continuous conduction mode. Additionally, the interleaving technique is applied in the power cell, providing a significant input current ripple reduction. It should be noticed that the main objective of this paper is to present a complete modeling for the converter operating in the critical conduction mode, allowing an improved design procedure for interleaved techniques with high input power factor, a complete dynamic analysis of the structure, and the possibility of implementing digital control techniques in closed loop.