102 resultados para DLTS


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An inexpensive and simple circuit to aid the direct measurement of majority carrier capture cross sections of impurity levels in the band gap of a semiconductor by the variable width filling pulse technique is presented. With proper synchronisation, during the period of application of the pulse, the device is disconnected from the capacitance meter to avoid distortion of the pulse and is reconnected again to the meter to record the emission transient. Modes of operation include manual triggering for long emission transients, repetitive triggering for isothermal and DLTS measurements and the DLTS mode which is to be used with signal analysers that already provide a synchronising pulse for disconnection.

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The electrical and optical properties of the thermally induced quenched-in levels in p-silicon which have heen attributed to iron are studied. The two levels, HI and H2, are located at Ev + 0.42 eV and Ev + 0.52 eV, respectively, as determined by TSCAP, DLTS, and transient photocapacitance methods. The photoionization cross sections are well described by Lucovsky's model. The hole capture by H1 is temperature dependent; a barrier of 40 meV is measured. However, multiphonon emission mechanism cannot be invoked to explain this temperature dependence due to the inferred zero lattice relaxation. The source of iron contamination is found to be the ambient conditions, in particular the quartz tube. The conflicting reports regarding the stability and the variation in the reported capture cross section values suggests that the observed Ev + 0.4 eV level must be a complex centre. The inferred near zero lattice relaxation during the electron transition implies weak coupling to the host lattice.

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Electrical properties of deep defects induced in n-silicon by -particles of about 10 MeV energy at a dose of 1014 and 1015 cm-2 are studied by DLTS. The levels at Ec -0.18 eV, Ec -0.26 eV, and Ec -0.48 eV are identified as A center, V2 (=/-) and V2 (-/0) on the basis of activation energy, electron capture cross section, and annealing behavior. Two other irradiation related levels at Ec -0.28 eV and Ec -0.51 eV could not be related to any known center.

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The apparent thermal activation energy of 0.56 eV and the electron thermal capture cross section of 2.0 × 10-16 cm2 are measured for the gold related acceptor level in p+ nn+ silicon diodes by isothermal current transient and DLTS techniques. Using the emission and capture rate data and a degeneracy ratio of 2, the energy separation of the trap level from the conduction band is calculated and found to have the same temperature dependence as the band gap indicating that the acceptor level is pinned with respect to the valence band a t Ev + 0.637 eV.

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The effects of the two sampling gate positions, and their widths and the integrator response times on the position, height, and shape of the peaks obtained in a double‐channel gated‐integrator‐based deep‐level transient spectroscopy (DLTS) system are evaluated. The best compromise between the sensitivity and the resolution of the DLTS system is shown to be obtained when the ratio of the two sampling gate positions is about 20. An integrator response time of about 100 ms is shown to be suitable for practical values of emission time constants and heating rates generally used.

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An attempt was made to study the deep level impurities and defects introduced into thyristor grade silicon under different processing conditions. DLTS, C-V and I-V measurements were carried out. The ideality factors of the diodes is around 1-7. Activation energy, trap density and minority carrier lifetime were measured.

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A deep‐level transient spectroscopy (DLTS) technique is reported for determining the capture cross‐section activation energy directly. Conventionally, the capture activation energy is obtained from the temperature dependence of the capture cross section. Capture cross‐section measurement is often very doubtful due to many intrinsic errors and is more critical for nonexponential capture kinetics. The essence of this technique is to use an emission pulse to allow the defects to emit electrons and the transient signal from capture process due to a large capture barrier was analyzed, in contrast with the emission signal in conventional DLTS. This technique has been applied for determining the capture barrier for silicon‐related DX centers in AlxGa1−xAs for different AlAs mole fractions.

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The configuration space of boron in silicon has been investigated using an empirical potential approach. This study indicates that energetically favourable configurations consist of a number of three-fold coordinated split interstitials. A configuration consisting of a four-fold boron-interstitial in combination with a two-fold silicon is found to be perfectly aligned in the <111> direction. This configuration in the positive charge state is a possibility for the boron interstitial related defect found via EPR and DLTS. © 1994.

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Deep level transient spectroscopy (DLTS) and thermally stimulated current spectroscopy (TSC) have been used to investigate defects in semi-conducting and semi-insulating (SI) InP after high temperature annealing, respectively. The results indicate that the annealing in iron phosphide ambient has an obvious suppression effect of deep defects, when compared with the annealing in phosphorus ambient. A defect annihilation phenomenon has also been observed in Fe-doped SI-InP materials after annealing. Mechanism of defect formation and annihilation related to in-diffusion of iron and phosphorus is discussed. Nature of the thermally induced defects has been discussed based on the results. (c) 2007 Elsevier Ltd. All rights reserved.

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Deep defects in annealed InP have been investigated by deep level transient capacitance spectroscopy (DLTS), photo induced current transient spectroscopy (PICTS) and thermally stimulated current spectroscopy (TSC). Both DLTS results of annealed semiconducting InP and PICTS and TSC results of annealed semi-insulating InP indicate that InP annealed in phosphorus ambient has five defects, while lid? annealed in iron phospbide ambient has two defects. Such a defect formation phenomenon is explained in terms of defect suppression by the iron atom diffusion process. The correlation of the defects and the nature of the defects in annealed InP are discussed based on the results.

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Deep level defects in high temperature annealed semi-conducting InP have been studied by deep level transient spectroscopy (DLTS). There is obvious difference in the deep defects between as-grown InP, InP annealed in phosphorus ambient and iron phosphide ambient, as far as their quantity and concentration are concerned. Only two defects at 0.24 and 0.64 eV can be detected in InP annealed in iron phosphide ambient, while defects at 0.24, 0.42, 0.54 and 0.64 eV have been detected in InP annealed in phosphorus ambient, in contrast to two defects at 0.49 and 0.64 eV or one defect at 0.13 eV in as-grown InP. A defect suppression phenomenon related to iron diffusion process has been observed. The formation mechanism and the nature of the defects have been discussed.

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Unusual dark current voltage (I-V) characteristics were observed in GaN Schottky diodes. I-V characteristics of the GaN Schottky diodes were measured down to the magnitude of 10(-14) A. Although these Schottky diodes were clearly rectifying, their I-V characteristics were non-ideal which can be judged from the non-linearity in the semi-logarithmic plots. Careful analysis of the forward bias I-V characteristics on log-log scale indicates space-charge-limited current (SCLC) conduction dominates the current transport in these GaN Schottky diodes. The concentration of the deep trapping centers was estimated to be higher than 10(15) cm(-3). In the deep level transient spectra (DLTS) measurements for the GaN Schottky diodes, deep defect levels around 0.20 eV below the bottom of the conduction band were identified, which may act as the trapping centers. The concentration of the deep centers obtained from the DLTS data is about 5 x 10(15) cm(-3). SCLC measurements may be used to probe the properties of deep levels in wide bandgap GaN-AlGaN compound semiconductors, as is the case with insulators in the presence of trapping centers. (c) 2005 Elsevier Ltd. All rights reserved.

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Deep level defects in annealed InP have been studied by using photoluminescence spectroscopy (PL), thermally stimulated current (TSC), deep level transient spectroscopy (DLTS), and positron annihilation lifetime (PAL). A noticeable broad PL peak centered at 1.3 eV has been observed in the InP sample annealed in iron phosphide ambient. Both the 1.3 eV PL emission and a defect at E-C-0.18 eV correlate with a divacancy detected in the annealed InP sample. The results make a divacancy defect and related property identified in the annealed InP. (c) 2006 American Institute of Physics.

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Current-based microscopic defect analysis method such as current deep level transient spectroscopy (I-DLTS) and thermally stimulated current have been developed over the years at Brookhaven National Laboratory (BNL) for the defect characterizations on heavily irradiated (Phi(n) >= 10(13) n/cm(2)) high-resistivity (>= 2 k Omega cm) Si sensors/detectors. The conventional DLTS method using a capacitance transient is not valid on heavily irradiated high-resistivity Si sensors/detectors. A new optical filling method, using lasers with various wavelengths, has been applied, which is more efficient and suitable than the traditional voltage-pulse filling. Optimum defect-filling schemes and conditions have been suggested for heavily irradiated high-resistivity Si sensors/detectors. (c) 2006 Published by Elsevier Ltd.

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Hydrogenated nanocrystalline silicon (nc-Si:H) layers of boron-doped increasing step by step was deposited on n-type crystalline silicon substrate using Plasma Enhanced Chemical Vapor Deposition (PECVD) system. After evaporating Ohm contact electrode on the side of substrate and on the side of nc-Si:H film, a structure of electrode/ (p)nc-Si:H/(n)c-Si/electrode was obtained. It is confirmed by electrical measurement such as I-V curve, C-V curve and DLTS that this is a variable capacitance diode. (C) 2003 Elsevier Science Ltd. All rights reserved.