Design space exploration of systolic realization of QR factorization on a runtime reconfigurable platform

In the world of high performance computing huge efforts have been put to accelerate Numerical Linear Algebra (NLA) kernels like QR Decomposition (QRD) with the added advantage of reconfigurability and scalability. While popular custom hardware solution in form of systolic arrays can deliver high performance, they are not scalable, and hence not commercially viable. In this paper, we show how systolic solutions of QRD can be realized efficiently on REDEFINE, a scalable runtime reconfigurable hardware platform. We propose various enhancements to REDEFINE to meet the custom need of accelerating NLA kernels. We further do the design space exploration of the proposed solution for any arbitrary application of size n × n. We determine the right size of the sub-array in accordance with the optimal pipeline depth of the core execution units and the number of such units to be used per sub-array.

Co-Exploration of NLA Kernels and Specification of Compute Elements in Distributed Memory CGRAs

Coarse Grained Reconfigurable Architectures (CGRA) are emerging as embedded application processing units in computing platforms for Exascale computing. Such CGRAs are distributed memory multi- core compute elements on a chip that communicate over a Network-on-chip (NoC). Numerical Linear Algebra (NLA) kernels are key to several high performance computing applications. In this paper we propose a systematic methodology to obtain the specification of Compute Elements (CE) for such CGRAs. We analyze block Matrix Multiplication and block LU Decomposition algorithms in the context of a CGRA, and obtain theoretical bounds on communication requirements, and memory sizes for a CE. Support for high performance custom computations common to NLA kernels are met through custom function units (CFUs) in the CEs. We present results to justify the merits of such CFUs.

Synthesis of Instruction Extensions on HyperCell, a Reconfigurable Datapath

In this paper we present HyperCell as a reconfigurable datapath for Instruction Extensions (IEs). HyperCell comprises an array of compute units laid over a switch network. We present an IE synthesis methodology that enables post-silicon realization of IE datapaths on HyperCell. The synthesis methodology optimally exploits hardware resources in HyperCell to enable software pipelined execution of IEs. Exploitation of temporal reuse of data in HyperCell results in significant reduction of input/output bandwidth requirements of HyperCell.

Rapid Implementation and Optimisation of DSP Systems on FPGA-Centric Hetrogeneous Platforms

This paper, chosen as a best paper from the 2005 SAMOS Workshop on Computer Systems: describes the for the first time the major Abhainn project for automated system level design of embedded signal processing systems. In particular, this describes four key novelties: novel algorithm modelling techniques for DSP systems, automated implementation realisation, algorithm transformation for system optimisation and automated inter-processor communication. This is applied to two complex systems: a radar and sonar system. In both cases technology which allows non-experts to automatically create low-overhead, high performance embedded signal processing systems is exhibited.

Automatic FPGA Synthesis of Memory Intensive C-based Kernels

Realising high performance image and signal processing
applications on modern FPGA presents a challenging implementation problem due to the large data frames streaming through these systems. Specifically, to meet the high bandwidth and data storage demands of these applications, complex hierarchical memory architectures must be manually specified
at the Register Transfer Level (RTL). Automated approaches which convert high-level operation descriptions, for instance in the form of C programs, to an FPGA architecture, are unable to automatically realise such architectures. This paper
presents a solution to this problem. It presents a compiler to automatically derive such memory architectures from a C program. By transforming the input C program to a unique dataflow modelling dialect, known as Valved Dataflow (VDF), a mapping and synthesis approach developed for this dialect can
be exploited to automatically create high performance image and video processing architectures. Memory intensive C kernels for Motion Estimation (CIF Frames at 30 fps), Matrix Multiplication (128x128 @ 500 iter/sec) and Sobel Edge Detection (720p @ 30 fps), which are unrealisable by current state-of-the-art C-based synthesis tools, are automatically derived from a C description of the algorithm.

Levante popular da juventude brasileira: saímos do Facebook

The paper studies the mobilization occurred in June 2013 in Brazil, initially under the banner of the Movement Free Pass, but without the existence of a lead, but multiple voices that alternate in search of social and economic change. The object of study is the communication made through social networks and their realization, or realization, the streets of major cities. The rallies demonstrate the power of communications media and a new phenomenon of talk, the use of social networks, now as uniting factor and not just a showcase of everyday life. The internet has become a new means of communication easy and free access, in addition to its fast dissipation data. Thus, the youth was used such technology to an uprising in the pursuit of social improvement of the cities where marches happened. Such a move still without an academic and social needs to be discussed so that, in addition to understood, can expand contributions to society, helping it in its claims. Was chosen as the site for the #causabrasil study and understanding of issues in which the public expresses dissatisfaction. The site performs an analysis with the combination of hastags a list of pre-registered and a list of terms used by different users of Facebook, Twitter, Instagram, Youtube and Google, through monitoring tool Seekr, and an infographic presents the main political demands of the population.

Levante popular da juventude brasileira: saímos do Facebook (on line)

The paper studies the mobilization occurred in June 2013 in Brazil, initially under the banner of the Movement Free Pass, but without the existence of a lead, but multiple voices that alternate in search of social and economic change. The object of study is the communication made through social networks and their realization, or realization, the streets of major cities. The rallies demonstrate the power of communications media and a new phenomenon of talk, the use of social networks, now as uniting factor and not just a showcase of everyday life. The internet has become a new means of communication easy and free access, in addition to its fast dissipation data. Thus, the youth was used such technology to an uprising in the pursuit of social improvement of the cities where marches happened. Such a move still without an academic and social needs to be discussed so that, in addition to understood, can expand contributions to society, helping it in its claims. Was chosen as the site for the #causabrasil study and understanding of issues in which the public expresses dissatisfaction. The site performs an analysis with the combination of hastags a list of pre-registered and a list of terms used by different users of Facebook, Twitter, Instagram, Youtube and Google, through monitoring tool Seekr, and an infographic presents the main political demands of the population.

Description de l'Ile de Patmos et de l'Ile de Samos /

Mode of access: Internet.

España sagrada. Memorias de los insignes Monasterios de S. Julián de Samos y S. Vicente de Monforte, examen critico de los monumentos que se dicen en los concilios lucenses, noticias ineditas del celebre codice de concilios que se conservo en esta iglesia hasta su traslacion a la Real Biblioteca del Escorial y del Ms. remitido a Roma a Gregorio XIII ... /

"Apéndices" de p. 293 a 427, texto en latín. Parte del texto a dos col. Anteportada.