963 resultados para silica-on-silicon


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We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

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We demonstrate an integrated on-chip compact and high efficiency Schottky detector for telecom wavelengths based on silicon metal waveguide. Detection is based on the internal photoemission process. Theory and experimental results are discussed. © 2012 OSA.

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We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip. © 2011 American Chemical Society.

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Gallium nitride (GaN) has a bright future in high voltage device owing to its remarkable physical properties and the possibility of growing heterostructures on silicon substrates. GaN High Electron Mobility Transistors (HEMTs) are expected to make a strong impact in off line applications and LED drives. However, unlike in silicon-based power devices, the on-state resistance of HEMT devices is hugely influenced by donor and acceptor traps at interfaces and in the bulk. This study focuses on the influence of donor traps located at the top interface between the semiconductor layer and the silicon nitride on the 2DEG density. It is shown through TCAD simulations and analytical study that the 2DEG charge density has an 'S' shape variation with two distinctive 'flat' regions, wherein it is not affected by the donor concentration, and one linear region. wherein the channel density increases proportionally with the donor concentration. We also show that the upper threshold value of the donor concentration within this 'S' shape increases significantly with the AIGaN thickness and the Al mole fraction and is highly affected by the presence of a thin GaN cap layer. © 2013 IEEE.

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We demonstrate an integrated on-chip compact and high efficiency Schottky detector for telecom wavelengths based on silicon metal waveguide. Detection is based on the internal photoemission process. Theory and experimental results are discussed. © 2012 Optical Society of America.

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Triisopropylsilylethynyl-pentacene (TIPS-PEN) has proven to be one of the most promising small molecules in the field of molecular electronics, due to its unique features in terms of stability, performance and ease of processing. Among a wide variety of well-established techniques for the deposition of TIPS-PEN, blade-metered methods have recently gained great interest towards the formation of uniform crystalline films over a large area. Following this rationale, we herein designed a versatile approach based on blade-coating, which overcomes the problem of anisotropic crystal formation by manipulating the solvent evaporation behaviour, in a way that brings about a preferential degree of crystal orientation. The applicability of this method was evaluated by fabricating field-effect transistors on glass as well as on silicon dioxide/silicon (SiO2/Si) substrates. Interestingly, in an attempt to improve the rheological and wetting behaviour of the liquid films on the SiO2/Si substrates, we introduced a polymeric interlayer of polystyrene (PS) or polymethylmethacrylate (PMMA) which concurrently acts as passivation and crystallization assisting layer. In this case, the synergistic effects of the highly-ordered crystalline structure and the oxide surface modification were thoroughly investigated. The overall performance of the fabricated devices revealed excellent electrical characteristics, with high saturation mobilities up to 0.72 cm2 V-1 s-1 (on glass with polymeric dielectric), on/off current ratio >104 and low threshold voltage values (<-5 V). This journal is © the Partner Organisations 2014.

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This paper reports the mechanical properties and fracture behavior of silicon carbide (3C-SiC) thin films grown on silicon substrates. Using bulge testing combined with a refined load-deflection model of long rectangular membranes, which takes into account the bending stiffness and prestress of the membrane material, the Young's modulus, prestress, and fracture strength for the 3C-SiC thin films with thicknesses of 0.40 and 1.42 mu m were extracted. The stress distribution in the membranes under a load was calculated analytically. The prestresses for the two films were 322 +/- 47 and 201 +/- 34 MPa, respectively. The thinner 3C-SiC film with a strong (111) orientation has a plane-gstrain moduli of 415 +/- 61 GPa, whereas the thicker film with a mixture of both (111) and (110) orientations exhibited a plane-strain moduli of 329 +/- 49 GPa. The corresponding fracture strengths for the two kinds of SiC films were 6.49 +/- 0.88 and 3.16 +/- 0.38 GPa, respectively. The reference stresses were computed by integrating the local stress of the membrane at the fracture over edge, surface, and volume of the specimens and were fitted with Weibull distribution function. For the 0.40-mu m-thick membranes, the surface integration has a better agreement between the data and the model, implying that the surface flaws are the dominant fracture origin. For the 1.42-mu m-thick membranes, the surface integration presented only a slightly better fitting quality than the other two, and therefore, it is difficult to rule out unambiguously the effects of the volume and edge flaws.

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10 mu m-thick ultra-thin Si (111) membranes for GaN epi-layers growth were successfully fabricated on silicon-on-insulator (SOI) substrate by backside etching the handle Si and buried oxide (BOX) layer. Then 1 mu m-thick GaN layers were deposited on these Si membranes by metal-organic chemical vapor deposition (MOCVD). The crack-free areas of 250 mu m, x 250 mu m were obtained on the GaN layers due to the reduction of thermal stress by using these ultra-thin Si membranes, which was further confirmed by the photoluminescence (PL) spectra and the simulation results from the finite element method calculation by using the software of ANSYS. In this paper, a newly developed approach was demonstrated to utilize micromechanical structures for GaN growth, which would improve the material quality of the epi-layers and facilitate GaN-based micro electro-mechanical system (MEMS) fabrication, especially the pressure sensor, in the future applications. (C) 2008 Elsevier Ltd. All rights reserved.

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Crack-free GaN films have been achieved by inserting an Indoped low-temperature (LT) AlGaN interlayer grown on silicon by metalorganic chemical vapor deposition. The relationship between lattice constants c and a obtained by X-ray diffraction analysis shows that indium doping interlayer can reduce the stress in GaN layers. The stress in GaN decreases with increasing trimethylindium (TMIn) during interlayer growth. Moreover, for a smaller TMIn flow, the stress in GaN decreases dramatically when In acts as a surfactant to improve the crystallinity of the AlGaN interlayer, and for a larger TMIn flow, the stress will increase again. The decreased stress leads to smoother surfaces and fewer cracks for GaN layers by using an In-doped interlayer than by using an undoped interlayer. In doping has been found to enhance the lateral growth and reduce the growth rate of the c face. It can explain the strain relief and cracks reduction in GaN films. (C) 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

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A 2 x 2 electro-optic switch is experimentally demonstrated using the optical structure of a Mach-Zehnder interferometer (MZI) based on a submicron rib waveguide and the electrical structure of a PIN diode on silicon-on-insulator (SOI). The switch behaviour is achieved through the plasma dispersion effect of silicon. The device has a modulation arm of I mm in length and cross-section of 400 nmx340 nm. The measurement results show that the switch has a V pi L pi figure of merit of 0.145 V-cm and the extinction ratios of two output ports and cross talk are 40 dB, 28 dB and -28 dB, respectively. A 3 dB modulation bandwidth of 90 MHz and a switch time of 6.8 ns for the rise edge and 2.7 ns for the fall edge are also demonstrated.

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We designed and fabricated a four-channel reconfigurable optical add-drop multiplexer based on silicon photonic wire waveguide, which is controlled through the thermo-optic effect. The effective footprint of the device is about 1000 x 500 mu m(2). The minimum insertion loss including the transmission loss and coupling loss is about 10.7 dB. The tuning bandwidth is about 17 nm, the average tuning efficiency about 6.11 mW/nm and the tuning speed about 24.5 kHz. (c) 2009 Elsevier B.V. All rights reserved.

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High quality Ge was epitaxially grown on Si using ultrahigh vacuum/chemical vapor deposition (UHV/CVD). This paper demonstrates efficient germanium-on-silicon p-i-n photodetectors with 0.8 mu m Ge, with responsivities as high as 0.38 and 0.21 A/W at 1.31 and 1.55 mu m, respectively. The dark current density is 0.37 mA/cm(2) and 29.4 mA/cm(2) at 0 V and a reverse bias of 0.5 V. The detector with a diameter of 30 mu m, a 3 dB-bandwidth of 4.72 GHz at an incident wavelength of 1550 nm and zero external bias has been measured. At a reverse bias of 3 V, the bandwidth is 6.28 GHz.

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We designed and fabricated a four-channel reconfigurable optical add-drop multiplexer based on silicon photonic wire waveguide controlled through thermo-optic effect. The effective footprint of the device is about 1000 x 500 mu m(2). The minimum insertion loss is about 10.7 dB and the tuning bandwidth about 17 nm. The average tuning power efficiency is about 6.187 mW/nm and the tuning speed about 24.4 kHz. The thermo-optic polarization-rotation effect is firstly reported in this paper. (C) 2009 Optical Society of America

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High-quality Ge film was epitaxially grown on silicon on insulator using the ultrahigh vacuum chemical vapor deposition. In this paper, we demonstrated that the efficient 1 4 germanium-on-silicon p-i-n photodetector arrays with 1.0 mu m Ge film had a responsivity as high as 0.65 A/W at 1.31 mu m and 0.32 A/W at 1.55 mu m, respectively. The dark current density was about 0.75 mA/cm(2) at 0 V and 13.9 mA/cm(2) at 1.0 V reverse bias. The detectors with a diameter of 25 mu m were measured at 1550 nm incident light under 0 V bias, and the result showed that the 3-dB bandwidth is 2.48 GHz. At a reverse bias of 3 V, the bandwidth is about 13.3 GHz. The four devices showed a good consistency.

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Gadolinium oxide thin films have been prepared on silicon (100) substrates with a low-energy dual ion-beam epitaxial technique. Substrate temperature was an important factor to affect the crystal structures and textures in an ion energy range of 100-500 eV. The films had a monoclinic Gd2O3 structure with preferred orientation ((4) over bar 02) at low substrate temperatures. When the substrate temperature was increased, the orientation turned to (202), and finally, the cubic structure appeared at the substrate temperature of 700 degreesC, which disagreed with the previous report because of the ion energy. The AES studies found that Gadolinium oxide shared Gd2O3 structures, although there were a lot of oxygen deficiencies in the films, and the XPS results confirmed this. AFM was also used to investigate the surface images of the samples. Finally, the electrical properties were presented. (C) 2004 Elsevier B.V. All rights reserved.