Broadband active differential array for the mid-frequency SKA band

This paper presents the design and characterization process of an active array demonstrator for the mid-frequency range (i.e., 300 MHz-1000 MHz) of the future Square Kilometre Array (SKA) radio telescope. This demonstrator, called FIDA3 (FG-IGN: Fundación General Instituto Geográfico Nacional - Differential Active Antenna Array), is part of the Spanish contribution for the SKA project. The main advantages provided by this design include the use of a dielectric-free structure, and the use of a fully-differential receiver in which differential low-noise amplifiers (LNAs) are directly connected to the balanced tapered-slot antennas (TSAs). First, the radiating structure and the differential low-noise amplifiers were separately designed and measured, obtaining good results (antenna elements with low voltage standing-wave ratios, array scanning capabilities up to 45°, and noise temperatures better than 52 K with low-noise amplifiers at room temperature). The potential problems due to the differential nature of the proposed solution are discussed, so some effective methods to overcome such limitations are proposed. Second, the complete active antenna array receiving system was assembled, and a 1 m2 active antenna array tile was characterized.

Memory isolation in many-core embedded systems

The current approach to developing mixed-criticality sys- tems is by partitioning the hardware resources (processors, memory and I/O devices) among the different applications. Partitions are isolated from each other both in the temporal and the spatial domain, so that low-criticality applications cannot compromise other applications with a higher level of criticality in case of misbehaviour. New architectures based on many-core processors open the way to highly parallel systems in which each partition can be allocated to a set of dedicated proces- sor cores, thus simplifying partition scheduling and temporal separation. Moreover, spatial isolation can also benefit from many-core architectures, by using simpler hardware mechanisms to protect the address spaces of different applications. This paper describes an architecture for many- core embedded partitioned systems, together with some implementation advice for spatial isolation.

Design and Simulation of Deep Nanometer SRAM Cells under Energy, Mismatch, and Radiation Constraints

La fiabilidad está pasando a ser el principal problema de los circuitos integrados según la tecnología desciende por debajo de los 22nm. Pequeñas imperfecciones en la fabricación de los dispositivos dan lugar ahora a importantes diferencias aleatorias en sus características eléctricas, que han de ser tenidas en cuenta durante la fase de diseño. Los nuevos procesos y materiales requeridos para la fabricación de dispositivos de dimensiones tan reducidas están dando lugar a diferentes efectos que resultan finalmente en un incremento del consumo estático, o una mayor vulnerabilidad frente a radiación. Las memorias SRAM son ya la parte más vulnerable de un sistema electrónico, no solo por representar más de la mitad del área de los SoCs y microprocesadores actuales, sino también porque las variaciones de proceso les afectan de forma crítica, donde el fallo de una única célula afecta a la memoria entera. Esta tesis aborda los diferentes retos que presenta el diseño de memorias SRAM en las tecnologías más pequeñas. En un escenario de aumento de la variabilidad, se consideran problemas como el consumo de energía, el diseño teniendo en cuenta efectos de la tecnología a bajo nivel o el endurecimiento frente a radiación. En primer lugar, dado el aumento de la variabilidad de los dispositivos pertenecientes a los nodos tecnológicos más pequeños, así como a la aparición de nuevas fuentes de variabilidad por la inclusión de nuevos dispositivos y la reducción de sus dimensiones, la precisión del modelado de dicha variabilidad es crucial. Se propone en la tesis extender el método de inyectores, que modela la variabilidad a nivel de circuito, abstrayendo sus causas físicas, añadiendo dos nuevas fuentes para modelar la pendiente sub-umbral y el DIBL, de creciente importancia en la tecnología FinFET. Los dos nuevos inyectores propuestos incrementan la exactitud de figuras de mérito a diferentes niveles de abstracción del diseño electrónico: a nivel de transistor, de puerta y de circuito. El error cuadrático medio al simular métricas de estabilidad y prestaciones de células SRAM se reduce un mínimo de 1,5 veces y hasta un máximo de 7,5 a la vez que la estimación de la probabilidad de fallo se mejora en varios ordenes de magnitud. El diseño para bajo consumo es una de las principales aplicaciones actuales dada la creciente importancia de los dispositivos móviles dependientes de baterías. Es igualmente necesario debido a las importantes densidades de potencia en los sistemas actuales, con el fin de reducir su disipación térmica y sus consecuencias en cuanto al envejecimiento. El método tradicional de reducir la tensión de alimentación para reducir el consumo es problemático en el caso de las memorias SRAM dado el creciente impacto de la variabilidad a bajas tensiones. Se propone el diseño de una célula que usa valores negativos en la bit-line para reducir los fallos de escritura según se reduce la tensión de alimentación principal. A pesar de usar una segunda fuente de alimentación para la tensión negativa en la bit-line, el diseño propuesto consigue reducir el consumo hasta en un 20 % comparado con una célula convencional. Una nueva métrica, el hold trip point se ha propuesto para prevenir nuevos tipos de fallo debidos al uso de tensiones negativas, así como un método alternativo para estimar la velocidad de lectura, reduciendo el número de simulaciones necesarias. Según continúa la reducción del tamaño de los dispositivos electrónicos, se incluyen nuevos mecanismos que permiten facilitar el proceso de fabricación, o alcanzar las prestaciones requeridas para cada nueva generación tecnológica. Se puede citar como ejemplo el estrés compresivo o extensivo aplicado a los fins en tecnologías FinFET, que altera la movilidad de los transistores fabricados a partir de dichos fins. Los efectos de estos mecanismos dependen mucho del layout, la posición de unos transistores afecta a los transistores colindantes y pudiendo ser el efecto diferente en diferentes tipos de transistores. Se propone el uso de una célula SRAM complementaria que utiliza dispositivos pMOS en los transistores de paso, así reduciendo la longitud de los fins de los transistores nMOS y alargando los de los pMOS, extendiéndolos a las células vecinas y hasta los límites de la matriz de células. Considerando los efectos del STI y estresores de SiGe, el diseño propuesto mejora los dos tipos de transistores, mejorando las prestaciones de la célula SRAM complementaria en más de un 10% para una misma probabilidad de fallo y un mismo consumo estático, sin que se requiera aumentar el área. Finalmente, la radiación ha sido un problema recurrente en la electrónica para aplicaciones espaciales, pero la reducción de las corrientes y tensiones de los dispositivos actuales los está volviendo vulnerables al ruido generado por radiación, incluso a nivel de suelo. Pese a que tecnologías como SOI o FinFET reducen la cantidad de energía colectada por el circuito durante el impacto de una partícula, las importantes variaciones de proceso en los nodos más pequeños va a afectar su inmunidad frente a la radiación. Se demuestra que los errores inducidos por radiación pueden aumentar hasta en un 40 % en el nodo de 7nm cuando se consideran las variaciones de proceso, comparado con el caso nominal. Este incremento es de una magnitud mayor que la mejora obtenida mediante el diseño de células de memoria específicamente endurecidas frente a radiación, sugiriendo que la reducción de la variabilidad representaría una mayor mejora. ABSTRACT Reliability is becoming the main concern on integrated circuit as the technology goes beyond 22nm. Small imperfections in the device manufacturing result now in important random differences of the devices at electrical level which must be dealt with during the design. New processes and materials, required to allow the fabrication of the extremely short devices, are making new effects appear resulting ultimately on increased static power consumption, or higher vulnerability to radiation SRAMs have become the most vulnerable part of electronic systems, not only they account for more than half of the chip area of nowadays SoCs and microprocessors, but they are critical as soon as different variation sources are regarded, with failures in a single cell making the whole memory fail. This thesis addresses the different challenges that SRAM design has in the smallest technologies. In a common scenario of increasing variability, issues like energy consumption, design aware of the technology and radiation hardening are considered. First, given the increasing magnitude of device variability in the smallest nodes, as well as new sources of variability appearing as a consequence of new devices and shortened lengths, an accurate modeling of the variability is crucial. We propose to extend the injectors method that models variability at circuit level, abstracting its physical sources, to better model sub-threshold slope and drain induced barrier lowering that are gaining importance in FinFET technology. The two new proposed injectors bring an increased accuracy of figures of merit at different abstraction levels of electronic design, at transistor, gate and circuit levels. The mean square error estimating performance and stability metrics of SRAM cells is reduced by at least 1.5 and up to 7.5 while the yield estimation is improved by orders of magnitude. Low power design is a major constraint given the high-growing market of mobile devices that run on battery. It is also relevant because of the increased power densities of nowadays systems, in order to reduce the thermal dissipation and its impact on aging. The traditional approach of reducing the voltage to lower the energy consumption if challenging in the case of SRAMs given the increased impact of process variations at low voltage supplies. We propose a cell design that makes use of negative bit-line write-assist to overcome write failures as the main supply voltage is lowered. Despite using a second power source for the negative bit-line, the design achieves an energy reduction up to 20% compared to a conventional cell. A new metric, the hold trip point has been introduced to deal with new sources of failures to cells using a negative bit-line voltage, as well as an alternative method to estimate cell speed, requiring less simulations. With the continuous reduction of device sizes, new mechanisms need to be included to ease the fabrication process and to meet the performance targets of the successive nodes. As example we can consider the compressive or tensile strains included in FinFET technology, that alter the mobility of the transistors made out of the concerned fins. The effects of these mechanisms are very dependent on the layout, with transistor being affected by their neighbors, and different types of transistors being affected in a different way. We propose to use complementary SRAM cells with pMOS pass-gates in order to reduce the fin length of nMOS devices and achieve long uncut fins for the pMOS devices when the cell is included in its corresponding array. Once Shallow Trench isolation and SiGe stressors are considered the proposed design improves both kinds of transistor, boosting the performance of complementary SRAM cells by more than 10% for a same failure probability and static power consumption, with no area overhead. While radiation has been a traditional concern in space electronics, the small currents and voltages used in the latest nodes are making them more vulnerable to radiation-induced transient noise, even at ground level. Even if SOI or FinFET technologies reduce the amount of energy transferred from the striking particle to the circuit, the important process variation that the smallest nodes will present will affect their radiation hardening capabilities. We demonstrate that process variations can increase the radiation-induced error rate by up to 40% in the 7nm node compared to the nominal case. This increase is higher than the improvement achieved by radiation-hardened cells suggesting that the reduction of process variations would bring a higher improvement.

Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter

En la última década la potencia instalada de energía solar fotovoltaica ha crecido una media de un 49% anual y se espera que alcance el 16%del consumo energético mundial en el año 2050. La mayor parte de estas instalaciones se corresponden con sistemas conectados a la red eléctrica y un amplio porcentaje de ellas son instalaciones domésticas o en edificios. En el mercado ya existen diferentes arquitecturas para este tipo de instalaciones, entre las que se encuentras los módulos AC. Un módulo AC consiste en un inversor, también conocido como micro-inversor, que se monta en la parte trasera de un panel o módulo fotovoltaico. Esta tecnología ofrece modularidad, redundancia y la extracción de la máxima potencia de cada panel solar de la instalación. Además, la expansión de esta tecnología posibilitará una reducción de costes asociados a las economías de escala y a la posibilidad de que el propio usuario pueda componer su propio sistema. Sin embargo, el micro-inversor debe ser capaz de proporcionar una ganancia de tensión adecuada para conectar el panel solar directamente a la red, mientras mantiene un rendimiento aceptable en un amplio rango de potencias. Asimismo, los estándares de conexión a red deber ser satisfechos y el tamaño y el tiempo de vida del micro-inversor son factores que han de tenerse siempre en cuenta. En esta tesis se propone un micro-inversor derivado de la topología “forward” controlado en el límite entre los modos de conducción continuo y discontinuo (BCM por sus siglas en inglés). El transformador de la topología propuesta mantiene la misma estructura que en el convertidor “forward” clásico y la utilización de interruptores bidireccionales en el secundario permite la conexión directa del inversor a la red. Asimismo el método de control elegido permite obtener factor de potencia cercano a la unidad con una implementación sencilla. En la tesis se presenta el principio de funcionamiento y los principales aspectos del diseño del micro-inversor propuesto. Con la idea de mantener una solución sencilla y de bajo coste, se ha seleccionado un controlador analógico que está originalmente pensado para controlar un corrector del factor de potencia en el mismo modo de conducción que el micro-inversor “forward”. La tesis presenta las principales modificaciones necesarias, con especial atención a la detección del cruce por cero de la corriente (ZCD por sus siglas en inglés) y la compatibilidad del controlador con la inclusión de un algoritmo de búsqueda del punto de máxima potencia (MPPT por sus siglas en inglés). Los resultados experimentales muestran las limitaciones de la implementación elegida e identifican al transformador como el principal contribuyente a las pérdidas del micro-inversor. El principal objetivo de esta tesis es contribuir a la aplicación de técnicas de control y diseño de sistemas multifase en micro-inversores fotovoltaicos. En esta tesis se van a considerar dos configuraciones multifase diferentes aplicadas al micro-inversor “forward” propuesto. La primera consiste en una variación con conexión paralelo-serie que permite la utilización de transformadores con una relación de vueltas baja, y por tanto bien acoplados, para conseguir una ganancia de tensión adecuada con un mejor rendimiento. Esta configuración emplea el mismo control BCM cuando la potencia extraída del panel solar es máxima. Este método de control implica que la frecuencia de conmutación se incrementa considerablemente cuando la potencia decrece, lo que compromete el rendimiento. Por lo tanto y con la intención de mantener unos bueno niveles de rendimiento ponderado, el micro-inversor funciona en modo de conducción discontinuo (DCM, por sus siglas en inglés) cuando la potencia extraía del panel solar es menor que la máxima. La segunda configuración multifase considerada en esta tesis es la aplicación de la técnica de paralelo con entrelazado. Además se han considerado dos técnicas diferentes para decidir el número de fases activas: dependiendo de la potencia continua extraída del panel solar y dependiendo de la potencia instantánea demandada por el micro-inversor. La aplicación de estas técnicas es interesante en los sistemas fotovoltaicos conectados a la red eléctrica por la posibilidad que brindan de obtener un rendimiento prácticamente plano en un amplio rango de potencia. Las configuraciones con entrelazado se controlan en DCM para evitar la necesidad de un control de corriente, lo que es importante cuando el número de fases es alto. Los núcleos adecuados para todas las configuraciones multifase consideradas se seleccionan usando el producto de áreas. Una vez seleccionados los núcleos se ha realizado un diseño detallado de cada uno de los transformadores. Con la información obtenida de los diseños y los resultados de simulación, se puede analizar el impacto que el número de transformadores utilizados tiene en el tamaño y el rendimiento de las distintas configuraciones. Los resultados de este análisis, presentado en esta tesis, se utilizan posteriormente para comparar las distintas configuraciones. Muchas otras topologías se han presentado en la literatura para abordar los diferentes aspectos a considerar en los micro-inversores, que han sido presentados anteriormente. La mayoría de estas topologías utilizan un transformador de alta frecuencia para solventar el salto de tensión y evitar problemas de seguridad y de puesta a tierra. En cualquier caso, es interesante evaluar si topologías sin aislamiento galvánico son aptas para su utilización como micro-inversores. En esta tesis se presenta una revisión de inversores con capacidad de elevar tensión, que se comparan bajo las mismas especificaciones. El objetivo es proporcionar la información necesaria para valorar si estas topologías son aplicables en los módulos AC. Las principales contribuciones de esta tesis son: • La aplicación del control BCM a un convertidor “forward” para obtener un micro-inversor de una etapa sencillo y de bajo coste. • La modificación de dicho micro-inversor con conexión paralelo-series de transformadores que permite reducir la corriente de los semiconductores y una ganancia de tensión adecuada con transformadores altamente acoplados. • La aplicación de técnicas de entrelazado y decisión de apagado de fases en la puesta en paralelo del micro-inversor “forward”. • El análisis y la comparación del efecto en el tamaño y el rendimiento del incremento del número de transformadores en las diferentes configuraciones multifase. • La eliminación de las medidas y los lazos de control de corriente en las topologías multifase con la utilización del modo de conducción discontinuo y un algoritmo MPPT sin necesidad de medida de corriente. • La recopilación y comparación bajo las mismas especificaciones de topologías inversoras con capacidad de elevar tensión, que pueden ser adecuadas para la utilización como micro-inversores. Esta tesis está estructurada en seis capítulos. El capítulo 1 presenta el marco en que se desarrolla la tesis así como el alcance de la misma. En el capítulo 2 se recopilan las topologías existentes de micro-invesores con aislamiento y aquellas sin aislamiento cuya implementación en un módulo AC es factible. Asimismo se presenta la comparación entre estas topologías bajo las mismas especificaciones. El capítulo 3 se centra en el micro-inversor “forward” que se propone originalmente en esta tesis. La aplicación de las técnicas multifase se aborda en los capítulos 4 y 5, en los que se presentan los análisis en función del número de transformadores. El capítulo está orientado a la propuesta paralelo-serie mientras que la configuración con entrelazado se analiza en el capítulo 5. Por último, en el capítulo 6 se presentan las contribuciones de esta tesis y los trabajos futuros. ABSTRACT In the last decade the photovoltaic (PV) installed power increased with an average growth of 49% per year and it is expected to cover the 16% of the global electricity consumption by 2050. Most of the installed PV power corresponds to grid-connected systems, with a significant percentage of residential installations. In these PV systems, the inverter is essential since it is the responsible of transferring into the grid the extracted power from the PV modules. Several architectures have been proposed for grid-connected residential PV systems, including the AC-module technology. An AC-module consists of an inverter, also known as micro-inverter, which is attached to a PV module. The AC-module technology offers modularity, redundancy and individual MPPT of each module. In addition, the expansion of this technology will enable the possibility of economies of scale of mass market and “plug and play” for the user, thus reducing the overall cost of the installation. However, the micro-inverter must be able to provide the required voltage boost to interface a low voltage PV module to the grid while keeping an acceptable efficiency in a wide power range. Furthermore, the quality standards must be satisfied and size and lifetime of the solutions must be always considered. In this thesis a single-stage forward micro-inverter with boundary mode operation is proposed to address the micro-inverter requirements. The transformer in the proposed topology remains as in the classic forward converter and bidirectional switches in the secondary side allows direct connection to the grid. In addition the selected control strategy allows high power factor current with a simple implementation. The operation of the topology is presented and the main design issues are introduced. With the intention to propose a simple and low-cost solution, an analog controller for a PFC operated in boundary mode is utilized. The main necessary modifications are discussed, with the focus on the zero current detection (ZCD) and the compatibility of the controller with a MPPT algorithm. The experimental results show the limitations of the selected analog controller implementation and the transformer is identified as a main losses contributor. The main objective of this thesis is to contribute in the application of control and design multiphase techniques to the PV micro-inverters. Two different multiphase configurations have been applied to the forward micro-inverter proposed in this thesis. The first one consists of a parallel-series connected variation which enables the use of low turns ratio, i.e. well coupled, transformers to achieve a proper voltage boost with an improved performance. This multiphase configuration implements BCM control at maximum load however. With this control method the switching frequency increases significantly for light load operation, thus jeopardizing the efficiency. Therefore, in order to keep acceptable weighted efficiency levels, DCM operation is selected for low power conditions. The second multiphase variation considered in this thesis is the interleaved configuration with two different phase shedding techniques: depending on the DC power extracted from the PV panel, and depending on the demanded instantaneous power. The application of interleaving techniques is interesting in PV grid-connected inverters for the possibility of flat efficiency behavior in a wide power range. The interleaved variations of the proposed forward micro-inverter are operated in DCM to avoid the current loop, which is important when the number of phases is large. The adequate transformer cores for all the multiphase configurations are selected according to the area product parameter and a detailed design of each required transformer is developed. With this information and simulation results, the impact in size and efficiency of the number of transformer used can be assessed. The considered multiphase topologies are compared in this thesis according to the results of the introduced analysis. Several other topological solutions have been proposed to solve the mentioned concerns in AC-module application. The most of these solutions use a high frequency transformer to boost the voltage and avoid grounding and safety issues. However, it is of interest to assess if the non-isolated topologies are suitable for AC-module application. In this thesis a review of transformerless step-up inverters is presented. The compiled topologies are compared using a set benchmark to provide the necessary information to assess whether non-isolated topologies are suitable for AC-module application. The main contributions of this thesis are: • The application of the boundary mode control with constant off-time to a forward converter, to obtain a simple and low-cost single-stage forward micro-inverter. • A modification of the forward micro-inverter with primary-parallel secondary-series connected transformers to reduce the current stress and improve the voltage gain with highly coupled transformers. •The application of the interleaved configuration with different phase shedding strategies to the proposed forward micro-inverter. • An analysis and comparison of the influence in size and efficiency of increasing the number of transformers in the parallel-series and interleaved multiphase configurations. • Elimination of the current loop and current measurements in the multiphase topologies by adopting DCM operation and a current sensorless MPPT. • A compilation and comparison with the same specifications of suitable non-isolated step-up inverters. This thesis is organized in six chapters. In Chapter 1 the background of single-phase PV-connected systems is discussed and the scope of the thesis is defined. Chapter 2 compiles the existing solutions for isolated micro-inverters and transformerless step-up inverters suitable for AC-module application. In addition, the most convenient non-isolated inverters are compared using a defined benchmark. Chapter 3 focuses on the originally proposed single-stage forward micro-inverter. The application of multiphase techniques is addressed in Chapter 4 and Chapter 5, and the impact in different parameters of increasing the number of phases is analyzed. In Chapter 4 an original primary-parallel secondary-series variation of the forward micro-inverter is presented, while Chapter 5 focuses on the application of the interleaved configuration. Finally, Chapter 6 discusses the contributions of the thesis and the future work.

Antisense oligonucleotides against rat brain α1E DNA and its atrial homologue decrease T-type calcium current in atrial myocytes

Low voltage-activated, or T-type, calcium currents are important regulators of neuronal and muscle excitability, secretion, and possibly cell growth and differentiation. The gene (or genes) coding for the pore-forming subunit of low voltage-activated channel proteins has not been unequivocally identified. We have used reverse transcription–PCR to identify partial clones from rat atrial myocytes that share high homology with a member of the E class of calcium channel genes. Antisense oligonucleotides targeting one of these partial clones (raE1) specifically block the increase in T-current density that normally results when atrial myocytes are treated with insulin-like growth factor 1 (IGF-1). Antisense oligonucleotides targeting portions of the neuronal rat α1E sequence, which are not part of the clones detected in atrial tissue, also block the IGF-1-induced increase in T-current, suggesting that the high homology to α1E seen in the partial clone may be present in the complete atrial sequence. The basal T-current expressed in these cells is also blocked by antisense oligonucleotides, which is consistent with the notion that IGF-1 up-regulates the same gene that encodes the basal current. These results support the hypothesis that a member of the E class of calcium channel genes encodes a low voltage-activated calcium channel in atrial myocytes.

Efficient and regulated erythropoietin production by naked DNA injection and muscle electroporation

We show that an electric treatment in the form of high-frequency, low-voltage electric pulses can increase more than 100-fold the production and secretion of a recombinant protein from mouse skeletal muscle. Therapeutical erythopoietin (EPO) levels were achieved in mice with a single injection of as little as 1 μg of plasmid DNA, and the increase in hematocrit after EPO production was stable and long-lasting. Pharmacological regulation through a tetracycline-inducible promoter allowed regulation of serum EPO and hematocrit levels. Tissue damage after stimulation was transient. The method described thus provides a potentially safe and low-cost treatment for serum protein deficiencies.

Altering the biochemical state of individual cultured cells and organelles with ultramicroelectrodes

We describe an efficient technique for the selective chemical and biological manipulation of the contents of individual cells. This technique is based on the electric-field-induced permeabilization (electroporation) in biological membranes using a low-voltage pulse generator and microelectrodes. A spatially highly focused electric field allows introduction of polar cell-impermeant solutes such as fluorescent dyes, fluorogenic reagents, and DNA into single cells. The high spatial resolution of the technique allows for design of, for example, cellular network constructions in which cells in close contact with each other can be made to possess different biochemical, biophysical, and morphological properties. Fluorescein, and fluo-3 (a calcium-sensitive fluorophore), are electroporated into the soma of cultured single progenitor cells derived from adult rat hippocampus. Fluo-3 also is introduced into individual submicrometer diameter processes of thapsigargin-treated progenitor cells, and a plasmid vector cDNA construct (pRAY 1), expressing the green fluorescent protein, is electroporated into cultured single COS 7 cells. At high electric field strengths, observations of dye-transfer into organelles are proposed.

Estudo sobre a interação de métodos anti-ilhamento para sistemas fotovoltaicos conectados à rede de distribuição de baixa tensão com múltiplos inversores.

Este trabalho estuda a interação entre os métodos anti-ilhamento aplicados em sistemas fotovoltaicos residenciais, operando simultaneamente em uma rede de distribuição de baixa tensão. Os sistemas fotovoltaicos em geral interagem entre si, com a rede de distribuição da concessionária e com outras fontes de geração distribuída. Uma consequência importante dessa interação é a ocorrência do ilhamento, que acontece quando as fontes de geração distribuída fornecem energia ao sistema elétrico de potência mesmo quando esta se encontra eletricamente isolada do sistema elétrico principal. A função anti-ilhamento é uma proteção extremamente importante, devendo estar presente em todos os sistemas de geração distribuída. Atualmente, são encontradas diversas técnicas na literatura. Muitas delas oferecem proteção adequada quando um inversor está conectado à linha de distribuição, mas podem falhar quando dois ou mais funcionam simultaneamente, conectados juntos ou próximos entre si. Dois destes métodos são analisados detalhadamente nesse estudo, avaliados em uma rede de distribuição residencial de baixa tensão. Os resultados obtidos mostram que a influência de um método sobre o outro é dependente da predominância de cada um deles dentro do sistema elétrico. Contudo, nas condições analisadas o ilhamento foi detectado dentro do limite máximo estabelecido pelas normas pertinentes.

Evidence for non-conservative current-induced forces in the breaking of Au and Pt atomic chains

This experimental work aims at probing current-induced forces at the atomic scale. Specifically it addresses predictions in recent work regarding the appearance of run-away modes as a result of a combined effect of the non-conservative wind force and a ‘Berry force’. The systems we consider here are atomic chains of Au and Pt atoms, for which we investigate the distribution of break down voltage values. We observe two distinct modes of breaking for Au atomic chains. The breaking at high voltage appears to behave as expected for regular break down by thermal excitation due to Joule heating. However, there is a low-voltage breaking mode that has characteristics expected for the mechanism of current-induced forces. Although a full comparison would require more detailed information on the individual atomic configurations, the systems we consider are very similar to those considered in recent model calculations and the comparison between experiment and theory is very encouraging for the interpretation we propose.

Análise do regime de produção distribuída fotovoltaica para autoconsumo

Tese de mestrado integrado em Engenharia da Energia e do Ambiente, apresentada à Universidade de Lisboa, através da Faculdade de Ciências, 2016

Electrophysiologic assessment of conduction abnormalities and atrial arrhythmias associated with amyloid cardiomyopathy.

BACKGROUND Arrhythmias in cardiac amyloidosis (CA) result in significant comorbidity and mortality but have not been well characterized. OBJECTIVE The purpose of this study was to define intracardiac conduction, atrial arrhythmia substrate, and ablation outcomes in a group of advanced CA patients referred for electrophysiologic study. METHODS Electrophysiologic study with or without catheter ablation was performed in 18 CA patients. Findings and catheter ablation outcomes were compared to age- and gender-matched non-CA patients undergoing catheter ablation of persistent atrial fibrillation (AF). RESULTS Supraventricular tachycardias were seen in all 18 CA patients (1 AV nodal reentrant tachycardia, 17 persistent atrial tachycardia [AT]/AF). The HV interval was prolonged (>55 ms) in all CA patients, including 6 with normal QRS duration (≤100 ms). Thirteen supraventricular tachycardia ablations were performed in 11 patients. Of these, 7 underwent left atrial (LA) mapping and ablation for persistent AT/AF. Compared to non-CA age-matched comparator AF patients, CA patients had more extensive areas of low-voltage areas LA (63% ± 22% vs 34% ± 22%, P = .009) and a greater number of inducible ATs (3.3 ± 1.9 ATs vs 0.2 ± 0.4 ATs, P <.001). The recurrence rate for AT/AF 1 year after ablation was greater in CA patients (83% vs 25%), and the hazard ratio for postablation AT/AF recurrence in CA patients was 5.4 (95% confidence interval 1.9-35.5, P = .007). CONCLUSION In this group of patients with advanced CA and atrial arrhythmias, there was extensive conduction system disease and LA endocardial voltage abnormality. Catheter ablation persistent AT/AF in advanced CA was associated with a high recurrence rate and appears to have a limited role in control of these arrhythmias.

Power quality improvements for LV networks

In order to increase the capacity of the existing Low Voltage grid, one solution is to increase the nominal residential network voltage from 230 V to 300 V, which is easily accommodated within the voltage rating of existing infrastructure such as cabling. A power electronic AC-AC converter would then be used to step the voltage back down to 230 V at an individual property. Such equipment could also be used to provide power quality improvements on both the utility and customer side of the converter depending on its topology. This paper provides an overview of a project which is looking at the development of such a device. The project is being carried out in collaboration with the local UK, Distribution Network Operator (DNO).

Small-signal input admittance characteristics of a brushless DC motor drive

To carry out stability studies on more electric systems in which there is a preponderance of motor drive equipment, input admittance expressions are required for the individual pieces of equipment. In this paper the techniques of averaging and small-signal linearisation will be used to derive a simple input admittance model for a low voltage, trapezoidal back EMF, brushless, DC motor drive system.

Ultrahigh step-up dc-dc converter for distributed generation by three Degrees of Freedom (3DoF) approach

This paper proposes a novel dc-dc converter topology to achieve an ultrahigh step-up ratio while maintaining a high conversion efficiency. It adopts a three degree of freedom approach in the circuit design. It also demonstrates the flexibility of the proposed converter to combine with the features of modularity, electrical isolation, soft-switching, low voltage stress on switching devices, and is thus considered to be an improved topology over traditional dc-dc converters. New control strategies including the two-section output voltage control and cell idle control are also developed to improve the converter performance. With the cell idle control, the secondary winding inductance of the idle module is bypassed to decrease its power loss. A 400-W dc-dc converter is prototyped and tested to verify the proposed techniques, in addition to a simulation study. The step-up conversion ratio can reach 1:14 with a peak efficiency of 94% and the proposed techniques can be applied to a wide range of high voltage and high power distributed generation and dc power transmission.

Indicador de inconformidades em instalações elétricas de baixa tensão

With the progress of devices technology, generation and use of energy ways, power quality parameters start to influence more significantly the various kinds of power consumers. Currently, there are many types of devices that analyze power quality. However, there is a need to create devices, and perform measurements and calculate parameters, find flaws, suggest changes, and to support the management of the installation. In addition, you must ensure that such devices are accessible. To maintain this balance, one magnitude measuring method should be used which does not require great resources processing or memory. The work shows that application of the Goertzel algorithm, compared with the commonly used FFT allows measurements to be made using much less hardware resources, available memory space to implement management functions. The first point of the work is the research of troubles that are more common for low voltage consumers. Then we propose the functional diagram indicate what will be measured, calculated, what problems will be detected and that solutions can be found. Through the Goertzel algorithm simulation using Scilab, is possible to calculate frequency components of a distorted signal with satisfactory results. Finally, the prototype is assembled and tests are carried out by adjusting the parameters necessary for one to maintain a reliable device without increasing its cost.