Memory isolation in many-core embedded systems
| Data(s) |
2014
|
|---|---|
| Resumo |
The current approach to developing mixed-criticality sys- tems is by partitioning the hardware resources (processors, memory and I/O devices) among the different applications. Partitions are isolated from each other both in the temporal and the spatial domain, so that low-criticality applications cannot compromise other applications with a higher level of criticality in case of misbehaviour. New architectures based on many-core processors open the way to highly parallel systems in which each partition can be allocated to a set of dedicated proces- sor cores, thus simplifying partition scheduling and temporal separation. Moreover, spatial isolation can also benefit from many-core architectures, by using simpler hardware mechanisms to protect the address spaces of different applications. This paper describes an architecture for many- core embedded partitioned systems, together with some implementation advice for spatial isolation. |
| Formato |
application/pdf |
| Identificador | |
| Idioma(s) |
spa |
| Publicador |
E.T.S. de Ingenieros Informáticos (UPM) |
| Relação |
http://oa.upm.es/37151/1/INVE_MEM_2014_198563.pdf http://www.cister.isep.ipp.pt/events/hipeac_2014/ TIN2011-28567-C03-01 info:eu-repo/grantAgreement/EC/FP7/IST 287702 |
| Direitos |
http://creativecommons.org/licenses/by-nc-nd/3.0/es/ info:eu-repo/semantics/openAccess |
| Fonte |
| 2nd Workshop on High-performance and Real-time Embedded SystemsProc. HIRES 2014. | 20-22 Jan 2014 | Viena, Austria |
| Palavras-Chave | #Informática |
| Tipo |
info:eu-repo/semantics/conferenceObject Ponencia en Congreso o Jornada PeerReviewed |