Lovelock terms and BRST cohomology

Lovelock terms are polynomial scalar densities in the Riemann curvature tensor that have the remarkable property that their Euler-Lagrange derivatives contain derivatives of the metric of an order not higher than 2 (while generic polynomial scalar densities lead to Euler-Lagrange derivatives with derivatives of the metric of order 4). A characteristic feature of Lovelock terms is that their first nonvanishing term in the expansion g λμ = η λμ + h λμ of the metric around flat space is a total derivative. In this paper, we investigate generalized Lovelock terms defined as polynomial scalar densities in the Riemann curvature tensor and its covariant derivatives (of arbitrarily high but finite order) such that their first nonvanishing term in the expansion of the metric around flat space is a total derivative. This is done by reformulating the problem as a BRST cohomological one and by using cohomological tools. We determine all the generalized Lovelock terms. We find, in fact, that the class of nontrivial generalized Lovelock terms contains only the usual ones. Allowing covariant derivatives of the Riemann tensor does not lead to a new structure. Our work provides a novel algebraic understanding of the Lovelock terms in the context of BRST cohomology. © 2005 IOP Publishing Ltd.

Libros de texto de matemáticas en España en los siglos XVIII y XIX

A finales del siglo XVIII, en Europa el conocimiento científico se había desarrollado extraordinariamente. Surgen los nombres de Lavoisier, Ritcher, Coulomb y Celsius entre otros muchos. Se enuncian leyes en química y física; junto a ellas también florece la matemática de la mano de Euler, Lagrange, D«Alambert, Monge, por citar sólo unos cuantos. Mientras tanto, el atraso de las matemáticas españolas se debía, entre otras causas, al pobre estado en que se encontraban las universidades: aún de tipo medieval y de carácter eclesiástico. Esto lo evidencia Fray Benito Jerónimo Feijoo en la carta titulada Causas del atraso que se padece en España en orden a las ciencias naturales, y el Marqués de la Ensenada quien, en 1748, se lo expresa al rey Fernando VI. Las deficiencias de las universidades tenían que ver con la enseñanza memorística, textos anticuados e interés primordial por disciplinas como derecho, teología y filosofía en detrimento de las matemáticas y las ciencias.

Dissociative ionization of molecules in intense laser fields

Accurate and efficient grid based techniques for the solution of the time-dependent Schrodinger equation for few-electron diatomic molecules irradiated by intense, ultrashort laser pulses are described. These are based on hybrid finite-difference, Lagrange mesh techniques. The methods are applied in three scenarios, namely H-2(+) with fixed internuclear separation, H-2(+) with vibrating nuclei and H-2 with fixed internuclear separation and illustrative results presented.

A discrete time-dependent method for metastable atoms and molecules in intense fields

The full-dimensional time-dependent Schrodinger equation for the electronic dynamics of single-electron systems in intense external fields is solved directly using a discrete method. Our approach combines the finite-difference and Lagrange mesh methods. The method is applied to calculate the quasienergies and ionization probabilities of atomic and molecular systems in intense static and dynamic electric fields. The gauge invariance and accuracy of the method is established. Applications to multiphoton ionization of positronium, the hydrogen atom and the hydrogen molecular ion are presented. At very high laser intensity, above the saturation threshold, we extend the method using a scaling technique to estimate the quasienergies of metastable states of the hydrogen molecular ion. The results are in good agreement with recent experiments. (C) 2004 American Institute of Physics.

A variational approach to the relaxation of single domain magnetic particles based on Brown's model

Brown's model for the relaxation of the magnetization of a single domain ferromagnetic particle is considered. This model results in the Fokker-Planck equation of the process. The solution of this equation in the cases of most interest is non- trivial. The probability density of orientations of the magnetization in the Fokker-Planck equation can be expanded in terms of an infinite set of eigenfunctions and their corresponding eigenvalues where these obey a Sturm-Liouville type equation. A variational principle is applied to the solution of this equation in the case of an axially symmetric potential. The first (non-zero) eigenvalue, corresponding to the largest time constant, is considered. From this we obtain two new results. Firstly, an approximate minimising trial function is obtained which allows calculation of a rigorous upper bound. Secondly, a new upper bound formula is derived based on the Euler-Lagrange condition. This leads to very accurate calculation of the eigenvalue but also, interestingly, from this, use of the simplest trial function yields an equivalent result to the correlation time of Coffey et at. and the integral relaxation time of Garanin. (C) 2004 Elsevier B.V. All rights reserved.

Efficient grid treatment of the ionization dynamics of laser-driven H-2(+)

We implement a parallel, time-dependent hybrid finite-difference Lagrange mesh code to model the electron dynamics of the fixed-nuclei hydrogen molecular ion subjected to intense ultrashort laser Pulses, Ionization rates are calculated and compared with results from a previous finite-difference approach and also with published Floquet results. The sensitivity of the results to the gauge describing the electron-field interaction is studied. Visualizations of the evolving wave packets are also presented in which the formation of a stable bound-state resonance is observed.

Multiplier-less realization of a poly-phase filter using LUT-based FPGAs

In DSP applications such as fixed transforms and filtering, the full flexibility of a general-purpose multiplier is not required and only a limited range of values is needed on one of the multiplier inputs. A new design technique has been developed for deriving multipliers that operate on a limited range of multiplicands. This can be used to produce FPGA implementations of DSP systems where area is dramatically improved. The paper describes the technique and its application to the design of a poly-phase filter on a Virtex FPGA. A 62% area reduction and 7% speed increase is gained when compared to an equivalent design using general purpose multipliers. It is also compared favourably to other known fixed coefficient approaches.

Power Efficient Dynamic-Range Utilisation for DSP On FPGA

A power and resource efficient ‘dynamic-range utilisation’ technique to increase operational capacity of DSP IP cores by exploiting redundancy in the data epresentation of sampled analogue input data, is presented. By cleverly partitioning dynamic-range into separable processing threads, several data streams are computed concurrently on the same hardware. Unlike existing techniques which act solely to reduce power consumption due to sign extension, here the dynamic range is exploited to increase operational capacity while still achieving reduced power consumption. This extends an existing system-level, power efficient framework for the design of low power DSP IP cores, which when applied to the design of an FFT IP core in a digital receiver system gives an architecture requiring 50% fewer multipliers, 12% fewer slices and 51%-56% less power.

Power Efficient DSP Datapath Configuration Methodology for FPGA

Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within peak power budget. A system level, low power design methodology for FPGA-based, variable length DSP IP cores is presented. Algorithmic commonality is identified and resources mapped with a configurable datapath, to increase achievable functionality. It is applied to a digital receiver application where a 100% increase in operational capacity is achieved in certain modes without significant power or area budget increases. Measured results show resulting architectures requires 19% less peak power, 33% fewer multipliers and 12% fewer slices than existing architectures.

Neural network forecasts of input-output technology

A significant part of the literature on input-output (IO) analysis is dedicated to the development and application of methodologies forecasting and updating technology coefficients and multipliers. Prominent among such techniques is the RAS method, while more information demanding econometric methods, as well as other less promising ones, have been proposed. However, there has been little interest expressed in the use of more modern and often more innovative methods, such as neural networks in IO analysis in general. This study constructs, proposes and applies a Backpropagation Neural Network (BPN) with the purpose of forecasting IO technology coefficients and subsequently multipliers. The RAS method is also applied on the same set of UK IO tables, and the discussion of results of both methods is accompanied by a comparative analysis. The results show that the BPN offers a valid alternative way of IO technology forecasting and many forecasts were more accurate using this method. Overall, however, the RAS method outperformed the BPN but the difference is rather small to be systematic and there are further ways to improve the performance of the BPN.

FPGA montgomery modular multiplication architectures suitable for ECCs over GF(p)

New FPGA architectures for the ordinary Montgomery multiplication algorithm and the FIOS modular multiplication algorithm are presented. The embedded 18×18-bit multipliers and fast carry look-ahead logic located on the Xilinx Virtex2 Pro family of FPGAs are used to perform the ordinary multiplications and additions/subtractions required by these two algorithms. The architectures are developed for use in Elliptic Curve Cryptosystems over GF(p), which require modular field multiplication to perform elliptic curve point addition and doubling. Field sizes of 128-bits and 256-bits are chosen but other field sizes can easily be accommodated, by rapidly reprogramming the FPGA. Overall, the larger the word size of the multiplier, the more efficiently it performs in terms of area/time product. Also, the FIOS algorithm is flexible in that one can tailor the multiplier architecture is to be area efficient, time efficient or a mixture of both by choosing a particular word size. It is estimated that the computation of a 256-bit scalar point multiplication over GF(p) would take about 4.8 ms.

Algorithms and architectures for high performance recursive filtering

Recently, a number of most significant digit (msd) first bit parallel multipliers for recursive filtering have been reported. However, the design approach which has been used has, in general, been heuristic and consequently, optimality has not always been assured. In this paper, msd first multiply accumulate algorithms are described and important relationships governing the dependencies between latency, number representations, etc are derived. A more systematic approach to designing recursive filters is illustrated by applying the algorithms and associated relationships to the design of cascadable modules for high sample rate IIR filtering and wave digital filtering.

Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking

In this paper, we explore various arithmetic units for possible use in high-speed, high-yield ALUs operated at scaled supply voltage with adaptive clock stretching. We demonstrate that careful logic optimization of the existing arithmetic units (to create hybrid units) indeed make them further amenable to supply voltage scaling. Such hybrid units result from mixing right amount of fast arithmetic into the slower ones. Simulations on different hybrid adder and multipliers in BPTM 70 nm technology show 18%-50% improvements in power compared to standard adders with only 2%-8% increase in die-area at iso-yield. These optimized datapath units can be used to construct voltage scalable robust ALUs that can operate at high clock frequency with minimal performance degradation due to occasional clock stretching. © 2009 IEEE.

Low-Power Process-Variation Tolerant Arithmetic Units Using Input-Based Elastic Clocking

In this paper we propose a design methodology for low-power high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in the fact that possible delay failures due to process variations and/or voltage scaling are predicted in advance and addressed by employing an elastic clocking technique. The prediction mechanism exploits the dependence of delay of arithmetic units upon input data patterns and identifies specific inputs that activate the critical path. Under iso-yield conditions, the proposed design operates at a lower scaled down Vdd without any performance degradation, while it ensures a superlative yield under a design style employing nominal supply and transistor threshold voltage. Simulation results show power savings of upto 29%, energy per computation savings of upto 25.5% and yield enhancement of upto 11.1% compared to the conventional adders and multipliers implemented in the 70nm BPTM technology. We incorporated the proposed modules in the execution unit of a five stage DLX pipeline to measure performance using SPEC2000 benchmarks [9]. Maximum area and throughput penalty obtained were 10% and 3% respectively.

Ideals of A(G) and bimodules over maximal abelian selfadjoint algebras

This paper is concerned with weak⁎ closed masa-bimodules generated by A(G)-invariant subspaces of VN(G). An annihilator formula is established, which is used to characterise the weak⁎ closed subspaces of B(L2(G)) which are invariant under both Schur multipliers and a canonical action of M(G) on B(L2(G)) via completely bounded maps. We study the special cases of extremal ideals with a given null set and, for a large class of groups, we establish a link between relative spectral synthesis and relative operator synthesis.