Modelling, simulation and characterization of epithelial cell culture biochip

A microfluidic Organ-on-Chip has been developed for monitoring the epithelial cells monolayer. Equivalent circuit Model was used to determine the electrical properties from the impedance spectra of the epithelial cells monolayer. Black platinum on platinum electrodes was electrochemically deposited onto the surface of electrodes to reduce the influence of the electrical double layer on the impedance measurements. Measurements of impedance with an Impedance Analyzer were done to validate the equivalent circuit model and the decrease of the double layer effect. A Lock-in Amplifier was designed to measure the impedance.

Microphysiological systems: Nuove piattaforme di coltura cellulare per applicazioni di interesse biomedico

In questo elaborato verranno presentati le finalità, gli sviluppi e le prospettive future di una tipologia di coltura cellulare, ovvero dei microphysiological systems - MPS (o organs-on-chips), nuovi microdispositivi atti a riprodorre il più fedelmente possibile le condizioni fisiologiche adatte per la crescita e il mantenimento di strutture cellulari complesse. Verranno quindi inizialmente descritte le specifiche di base di questi dispositivi, sottolineandone l'innovatività dal punto di vista tecnologico e funzionale. Grazie agli MPS è infatti stato possibile intraprendere studi per una migliore comprensione del comportamento in condizioni dinamiche di una vasta gamma di tessuti, e la risposta di questi a stimoli chimici e fisici, rappresentativi di condizioni fisiologiche o patologiche, aprendo così le porte a nuovi standard per la sperimentazione clinica. Verrà quindi proposto un caso di studio, che riguarda l'applicazione di quanto sopra all'ambito cardiocircolatorio, prendendo in esame un modello di heart-on-a-chip, descrivendolo in tutte le fasi della sua realizzazione e infine discutendo uno studio riguardante la risposta delle cellule del muscolo cardiaco a un trattamento farmacologico.

Caenorhabditis elegans Heterochromatin protein 1 (HPL-2) links developmental plasticity, longevity and lipid metabolism

Background Heterochromatin protein 1 (HP1) family proteins have a well-characterized role in heterochromatin packaging and gene regulation. Their function in organismal development, however, is less well understood. Here we used genome-wide expression profiling to assess novel functions of the Caenorhabditis elegans HP1 homolog HPL-2 at specific developmental stages. Results We show that HPL-2 regulates the expression of germline genes, extracellular matrix components and genes involved in lipid metabolism. Comparison of our expression data with HPL-2 ChIP-on-chip profiles reveals that a significant number of genes up- and down-regulated in the absence of HPL-2 are bound by HPL-2. Germline genes are specifically up-regulated in hpl-2 mutants, consistent with the function of HPL-2 as a repressor of ectopic germ cell fate. In addition, microarray results and phenotypic analysis suggest that HPL-2 regulates the dauer developmental decision, a striking example of phenotypic plasticity in which environmental conditions determine developmental fate. HPL-2 acts in dauer at least partly through modulation of daf-2/IIS and TGF-β signaling pathways, major determinants of the dauer program. hpl-2 mutants also show increased longevity and altered lipid metabolism, hallmarks of the long-lived, stress resistant dauers. Conclusions Our results suggest that the worm HP1 homologue HPL-2 may coordinately regulate dauer diapause, longevity and lipid metabolism, three processes dependent on developmental input and environmental conditions. Our findings are of general interest as a paradigm of how chromatin factors can both stabilize development by buffering environmental variation, and guide the organism through remodeling events that require plasticity of cell fate regulation.

Diagnostic microchip to assay 3D colony-growth potential of captured circulating tumor cells

Microfluidic technology has been successfully applied to isolate very rare tumor-derived epithelial cells (circulating tumor cells, CTCs) from blood with relatively high yield and purity, opening up exciting prospects for early detection of cancer. However, a major limitation of state-of-the-art CTC-chips is their inability to characterize the behavior and function of captured CTCs, for example to obtain information on proliferative and invasive properties or, ultimately, tumor re-initiating potential. Although CTCs can be efficiently immunostained with markers reporting phenotype or fate (e.g. apoptosis, proliferation), it has not yet been possible to reliably grow captured CTCs over long periods of time and at single cell level. It is challenging to remove CTCs from a microchip after capture, therefore such analyses should ideally be performed directly on-chip. To address this challenge, we merged CTC capture with three-dimensional (3D) tumor cell culture on the same microfluidic platform. PC3 prostate cancer cells were isolated from spiked blood on a transparent PDMS CTC-chip, encapsulated on-chip in a biomimetic hydrogel matrix (QGel™) that was formed in situ, and their clonal 3D spheroid growth potential was assessed by microscopy over one week in culture. The possibility to clonally expand a subset of captured CTCs in a near-physiological in vitro model adds an important element to the expanding CTC-chip toolbox that ultimately should improve prediction of treatment responses and disease progression.

Microfluidic fabrication of advanced microcapsules for use in self-healing materials

The proposed work aims to facilitate the development of a microfluidic platform for the production of advanced microcapsules containing active agents which can be the functional constituents of self-healing composites. The creation of such microcapsules is enabled by the unique flow characteristics within microchannels including precise control over shear and interfacial forces for droplet creation and manipulation as well as the ability to form a solid shell either chemically or via the addition of thermal or irradiative energy. Microchannel design and a study of the fluid dynamics and mechanisms for shell creation are undertaken in order to establish a fabrication approach capable of producing healing-agent-containing microcapsules. An in-depth study of the process parameters has been undertaken in order to elucidate the advantages of this production technique including precise control of size (i.e., monodispersity) and surface morphology of the microcapsules. This project also aims to aid the optimization of the mechanical properties as well as healing performance of self-healing composites by studying the effects of the advantageous properties of the as-produced microcapsules. Scale-up of the microfluidic fabrication using parallel devices on a single chip as well as on-chip microcapsule production and shape control will also be investigated. It will be demonstrated that microfluidic fabrication is a versatile approach for the efficient creation of functional microcapsules allowing for superior design of self-healing composites.

High-density metallic nano-emitter arrays and their field emission characteristics

We report the fabrication and field emission properties of high-density nano-emitter arrays with on-chip electron extraction gate electrodes and up to 106 metallic nanotips that have an apex curvature radius of a few nanometers and a the tip density exceeding 108 cm−2. The gate electrode was fabricated on top of the nano-emitter arrays using a self-aligned polymer mask method. By applying a hot-press step for the polymer planarization, gate–nanotip alignment precision below 10 nm was achieved. Fabricated devices exhibited stable field electron emission with a current density of 0.1 A cm−2, indicating that these are promising for applications that require a miniature high-brightness electron source.

Improved Space Object Orbit Determination Using CMOS Detectors

CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration,and the potential to perform image processing operations on-chip and in real-time. Here, the major challenges and design drivers for ground-based and space-based optical observation strategies for objects in Earth orbit have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and spacebased strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey assuming a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario a sensor in a sun-synchronous LEO orbit, always pointing in the anti-sun direction to achieve optimum illumination conditions for small LEO debris was simulated.

High-Resolution Chemical Depth Profiling of Solid Material Using a Miniature Laser Ablation/Ionization Mass Spectrometer

High-resolution chemical depth profiling measurements of copper films are presented. The 10 μm thick copper test samples were electrodeposited on a Si-supported Cu seed under galvanostatic conditions in the presence of particular plating additives (SPS, Imep, PEI, and PAG) used in the semiconductor industry for the on-chip metallization of interconnects. To probe the trend of these plating additives toward inclusion into the deposit upon growth, quantitative elemental mass spectrometric measurements at trace level concentration were conducted by using a sensitive miniature laser ablation ionization mass spectrometer (LIMS), originally designed and developed for in situ space exploration. An ultrashort pulsed laser system (τ ∼ 190 fs, λ = 775 nm) was used for ablation and ionization of sample material. We show that with our LIMS system, quantitative chemical mass spectrometric analysis with an ablation rate at the subnanometer level per single laser shot can be conducted. The measurement capabilities of our instrument, including the high vertical depth resolution coupled with high detection sensitivity of ∼10 ppb, high dynamic range ≥10(8), measurement accuracy and precision, is of considerable interest in various fields of application, where investigations with high lateral and vertical resolution of the chemical composition of solid materials are required, these include, e.g., wafers from semiconductor industry or studies on space weathered samples in space research.

Primary human lung pericytes support and stabilize in-vitro perfusable microvessels.

The formation of blood vessels is a complex tissue-specific process that plays a pivotal role during developmental processes, in wound healing, cancer progression, fibrosis and other pathologies. To study vasculogenesis and vascular remodeling in the context of the lung, we developed an in-vitro microvascular model that closely mimics the human lung microvasculature in terms of 3D architecture, accessibility, functionality and cell types. Human pericytes from the distal airway were isolated and characterized using flow cytometry. To assess their role in the generation of normal microvessels, lung pericytes were mixed in fibrin gel and seeded into well-defined microcompartments together with primary endothelial cells (HUVEC). Patent microvessels covering an area of 3.1 mm2 formed within 3-5 days and were stable for up to 14 days. Soluble signals from the lung pericytes were necessary to establish perfusability, and pericytes migrated towards endothelial microvessels. Cell-cell communication in the form of adherens and tight junctions, as well as secretion of basement membrane was confirmed using transmission electron microscopy and immunocytochemistry on chip. Direct co-culture of pericytes with endothelial cells decreased the microvascular permeability by one order of magnitude from 17.8∙10-6 cm/s to 2.0∙10-6 cm/s and led to vessels with significantly smaller and less variable diameter. Upon phenylephrine administration, vasoconstriction was observed in microvessels lined with pericytes but not in endothelial microvessels only. Perfusable microvessels were also generated with human lung microvascular endothelial cells and lung pericytes. Human lung pericytes were thus shown to have a prominent influence on microvascular morphology, permeability, vasoconstriction and long-term stability in an in-vitro microvascular system. This biomimetic platform opens new possibilities to test functions and interactions of patient-derived cells in a physiologically relevant microvascular setting.

Temperature Sensor Placement Including Routing Overhead and Sampling Inaccuracies

Dynamic thermal management techniques require a collection of on-chip thermal sensors that imply a significant area and power overhead. Finding the optimum number of temperature monitors and their location on the chip surface to optimize accuracy is an NP-hard problem. In this work we improve the modeling of the problem by including area, power and networking constraints along with the consideration of three inaccuracy terms: spatial errors, sampling rate errors and monitor-inherent errors. The problem is solved by the simulated annealing algorithm. We apply the algorithm to a test case employing three different types of monitors to highlight the importance of the different metrics. Finally we present a case study of the Alpha 21364 processor under two different constraint scenarios.

Power management techniques in an FPGA-Based WSN node for high performance application

In this work, the power management techniques implemented in a high-performance node for Wireless Sensor Networks (WSN) based on a RAM-based FPGA are presented. This new node custom architecture is intended for high-end WSN applications that include complex sensor management like video cameras, high compute demanding tasks such as image encoding or robust encryption, and/or higher data bandwidth needs. In the case of these complex processing tasks, yet maintaining low power design requirements, it can be shown that the combination of different techniques such as extensive HW algorithm mapping, smart management of power islands to selectively switch on and off components, smart and low-energy partial reconfiguration, an adequate set of save energy modes and wake up options, all combined, may yield energy results that may compete and improve energy usage of typical low power microcontrollers used in many WSN node architectures. Actually, results show that higher complexity tasks are in favor of HW based platforms, while the flexibility achieved by dynamic and partial reconfiguration techniques could be comparable to SW based solutions.

Development of Embedded Linux Applications Using ZedBoard

The purpose of this document is to create a modest integration guide for embedding a Linux Operating System on ZedBoard development platform, based on Xilinx’s Zynq-7000 All Programmable System on Chip which contains a dual core ARM Cortex-A9 and a 7 Series FPGA Artix-7. The integration process has been structured in four chapters according to the logic generation of the different parts that compose the embedded system. With the intention of automating the generation process of a complete Linux distribution specific for ZedBoard platform, BuildRoot development platform it is used. Once the embedding process finished, it was decided to add to the system the required functionalities for adding support for IEEE1588 Standard for Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, through a user space Linux program which implements the protocol. That PTP user space implementation program has been cross-compiled, executed on target and tested for evaluating the functionalities added. RESUMEN El propósito de este documento es crear una modesta guía de integración de un sistema operativo Linux para la plataforma de desarrollo ZedBoard, basada en un System on Chip del fabricante Xilinx llamado Zynq-7000. Este System on Chip está compuesto por un procesador de doble núcleo ARM Cortex-A9 y una FPGA de la Serie 7 equiparable a una Artix-7. El proceso de integración se ha estructurado en cuatro grandes capítulos que se rigen según el orden lógico de generación de las distintas partes por las que el sistema empotrado está compuesto. Con el ánimo de automatizar el proceso de creación de una distribución de Linux específica para la plataforma ZedBoard, se ha utilizado la plataforma de desarrollo BuildRoot. Una vez terminado el proceso de integración del sistema empotrado, se procedió a dar dotar al sistema de las funcionalidades necesarias para dar soporte al estándar de sincronización de relojes en redes de área local, PTP IEEE1588, a través de una implementación del mismo en un programa de lado de usuario el cual ha sido compilado, ejecutado y testeado para evaluar el correcto funcionamiento de las funcionalidades añadidas.

Sintetizador analógico en Arduino

Este proyecto consiste en el diseño y construcción de un sintetizador basado en el chip 6581 Sound Interface Device (SID). Este chip era el encargado de la generación de sonido en el Commodore 64, ordenador personal comercializado en 1982, y fue el primer sintetizador complejo construido para ordenador. El chip en cuestión es un sintetizador de tres voces, cada una de ellas capaz de generar cuatro diferentes formas de onda. Cada voz tiene control independiente de varios parámetros, permitiendo una relativamente amplia variedad de sonidos y efectos, muy útil para su uso en videojuegos. Además está dotado de un filtro programable para conseguir distintos timbres mediante síntesis sustractiva. El sintetizador se ha construido sobre Arduino, una plataforma de electrónica abierta concebida para la creación de prototipos, consistente en una placa de circuito impreso con un microcontrolador, programable desde un PC para que realice múltiples funciones (desde encender LEDs hasta controlar servomecanismos en robótica, procesado y transmisión de datos, etc.). El sintetizador es controlable vía MIDI, por ejemplo, desde un teclado de piano. A través de MIDI recibe información tal como qué notas debe tocar, o los valores de los parámetros del SID que modifican las propiedades del sonido. Además, toda esa información también la puede recibir de un PC mediante una conexión USB. Se han construido dos versiones del sintetizador: una versión “hardware”, que utiliza el SID para la generación de sonido, y otra “software”, que reemplaza el SID por un emulador, es decir, un programa que se comporta (en la medida de lo posible) de la misma manera que el SID. El emulador se ha implementado en un microcontrolador Atmega 168 de Atmel, el mismo que utiliza Arduino. ABSTRACT. This project consists on design and construction of a synthesizer which is based on chip 6581 Sound Interface Device (SID). This chip was used for sound generation on the Commodore 64, a home computer presented in 1982, and it was the first complex synthesizer built for computers. The chip is a three-voice synthesizer, each voice capable of generating four different waveforms. Each voice has independent control of several parameters, allowing a relatively wide variety of sounds and effects, very useful for its use on videogames. It also includes a programmable filter, allowing more timbre control via subtractive synthesis. The synthesizer has been built on Arduino, an open-source electronics prototyping platform that consists on a printed circuit board with a microcontroller, which is programmable with a computer to do several functions (lighting LEDs, controlling servomechanisms on robotics, data processing or transmission, etc.). The synthesizer is controlled via MIDI, in example, from a piano-type keyboard. It receives from MIDI information such as the notes that should be played or SID’s parameter values that modify the sound. It also can receive that information from a PC via USB connection. Two versions of the synthesizer have been built: a hardware one that uses the SID chip for sound generation, and a software one that replaces SID by an emulator, it is, a program that behaves (as far as possible) in the same way the SID would. The emulator is implemented on an Atmel’s Atmega 168 microcontroller, the same one that is used on Arduino.

A self-timed multipurpose delay sensor for field programmable gate arrays (FPGAs)

This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability, critical path timing and temperature variations. The proposed topology, through the use of both combinational and sequential FPGA elements, amplifies the time of a signal traversing a delay chain to produce a pulse whose width is the sensor’s measurement. The sensor is fully self-timed, avoiding the need for clock distribution networks and eliminating the limitations imposed by the system clock. One single off- or on-chip time-to-digital converter is able to perform digitization of several sensors in a single operation. These features allow for a simplified approach for designers wanting to intertwine a multi-purpose sensor network with their application logic. Employed as a temperature sensor, it has been measured to have an error of ±0.67 °C, over the range of 20–100 °C, employing 20 logic elements with a 2-point calibration.

Explointing FPGA block memories for protected cryptographic implementations

Modern Field Programmable Gate Arrays (FPGAs) are power packed with features to facilitate designers. Availability of features like huge block memory (BRAM), Digital Signal Processing (DSP) cores, embedded CPU makes the design strategy of FPGAs quite different from ASICs. FPGA are also widely used in security-critical application where protection against known attacks is of prime importance. We focus ourselves on physical attacks which target physical implementations. To design countermeasures against such attacks, the strategy for FPGA designers should also be different from that in ASIC. The available features should be exploited to design compact and strong countermeasures. In this paper, we propose methods to exploit the BRAMs in FPGAs for designing compact countermeasures. BRAM can be used to optimize intrinsic countermeasures like masking and dual-rail logic, which otherwise have significant overhead (at least 2X). The optimizations are applied on a real AES-128 co-processor and tested for area overhead and resistance on Xilinx Virtex-5 chips. The presented masking countermeasure has an overhead of only 16% when applied on AES. Moreover Dual-rail Precharge Logic (DPL) countermeasure has been optimized to pack the whole sequential part in the BRAM, hence enhancing the security. Proper robustness evaluations are conducted to analyze the optimization for area and security.