Geometric quantum computation using fictitious spin-1/2 subspaces of strongly dipolar coupled nuclear spins

Geometric phases have been used in NMR to implement controlled phase shift gates for quantum-information processing, only in weakly coupled systems in which the individual spins can be identified as qubits. In this work, we implement controlled phase shift gates in strongly coupled systems by using nonadiabatic geometric phases, obtained by evolving the magnetization of fictitious spin-1/2 subspaces, over a closed loop on the Bloch sphere. The dynamical phase accumulated during the evolution of the subspaces is refocused by a spin echo pulse sequence and by setting the delay of transition selective pulses such that the evolution under the homonuclear coupling makes a complete 2 pi rotation. A detailed theoretical explanation of nonadiabatic geometric phases in NMR is given by using single transition operators. Controlled phase shift gates, two qubit Deutsch-Jozsa algorithm, and parity algorithm in a qubit-qutrit system have been implemented in various strongly dipolar coupled systems obtained by orienting the molecules in liquid crystal media.

Karnaugh map synthesis of multigate threshold networks

It has been shown in an earlier paper that I-realizability of a unate function F of up to six variables corresponds to ' compactness ' of the plot of F on a Karnaugh map. Here, an algorithm has been presented to synthesize on a Karnaugh map a non-threahold function of up to Bix variables with the minimum number of threshold gates connected in cascade. Incompletely specified functions can also be treated. No resort to inequalities is made and no pre-processing (such as positivizing and ordering) of the given switching function is required.

Analysis of transients in a canal network

A generalised formulation of the mathematical model developed for the analysis of transients in a canal network, under subcritical flow, with any realistic combination of control structures and their multiple operations, has been presented. The model accounts for a large variety of control structures such as weirs, gates, notches etc. discharging under different conditions, namely submerged and unsubmerged. A numerical scheme to compute and approximate steady state flow condition as the initial condition has also been presented. The model can handle complex situations that may arise from multiple gate operations. This has been demonstrated with a problem wherein the boundary conditions change from a gate discharge equation to an energy equation and back to a gate discharge equation. In such a situation the wave strikes a fixed gate and leads to large and rapid fluctuations in both discharge and depth.

Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique

The increasing variability in device leakage has made the design of keepers for wide OR structures a challenging task. The conventional feedback keepers (CONV) can no longer improve the performance of wide dynamic gates for the future technologies. In this paper, we propose an adaptive keeper technique called rate sensing keeper (RSK) that enables faster switching and tracks the variation across different process corners. It can switch upto 1.9x faster (for 20 legs) than CONV and can scale upto 32 legs as against 20 legs for CONV in a 130-nm 1.2-V process. The delay tracking is within 8% across the different process corners. We demonstrate the circuit operation of RSK using a 32 x 8 register file implemented in an industrial 130-nm 1.2-V CMOS process. The performance of individual dynamic logic gates are also evaluated on chip for various keeper techniques. We show that the RSK technique gives superior performance compared to the other alternatives such as Conditional Keeper (CKP) and current mirror-based keeper (LCR).

Extended Muskingum method for flood routing

Routing of floods is essential to control the flood flow at the flood control station such that it is within the specified safe limit. In this paper, the applicability of the extended Muskingum method is examined for routing of floods for a case study of Hirakud reservoir, Mahanadi river basin, India. The inflows to the flood control station are of two types-one controllable which comprises of reservoir releases for power and spill and the other is uncontrollable which comprises of inflow from lower tributaries and intermediate catchment between the reservoir and the flood control station. Muskingum model is improved to incorporate multiple sources of inflows and single outflow to route the flood in the reach. Instead of time lag and prismoidal flow parameters, suitable coefficients for various types of inflows were derived using Linear Programming. Presently, the decisions about operation of gates of Hirakud dam are being taken once in 12 h during floods. However, four time intervals of 24, 18, 12 and 6 h are examined to test the sensitivity of the routing time interval on the computed flood flow at the flood control station. It is observed that mean relative error decreases with decrease in routing interval both for calibration and testing phase. It is concluded that the extended Muskingum method can be explored for similar reservoir configurations such as Hirakud reservoir with suitable modifications. (C) 2010 International Association of Hydro-environment Engineering and Research. Asia Pacific Division. Published by Elsevier By. All rights reserved.

Developments in quantum information processing by nuclear magnetic resonance: Use of quadrupolar and dipolar couplings

Use of dipolar and quadrupolar couplings for quantum information processing (QIP) by nuclear magnetic resonance (NMR) is described. In these cases, instead of the individual spins being qubits, the 2(n) energy levels of the spin-system can be treated as an n-qubit system. It is demonstrated that QIP in such systems can be carried out using transition-selective pulses, in (CHCN)-C-3, (CH3CN)-C-13, Li-7 (I = 3/2) and Cs-133 (I = 7/2), oriented in liquid crystals yielding 2 and 3 qubit systems. Creation of pseudopure states, implementation of logic gates and arithmetic operations (half-adder and subtractor) have been carried out in these systems using transition-selective pulses.

On synthesis of easily testable (k, K) circuits

A (k-, K) circuit is one which can be decomposed into nonintersecting blocks of gates where each block has no more than K external inputs, such that the graph formed by letting each block be a node and inserting edges between blocks if they share a signal line, is a partial k-tree. (k, K) circuits are special in that they have been shown to be testable in time polynomial in the number of gates in the circuit, and are useful if the constants k and K are small. We demonstrate a procedure to synthesise (k, K) circuits from a special class of Boolean expressions.

A low power, process invariant keeper design for high speed dynamic logic circuits

A low power keeper circuit using the concept of rate sensing has been proposed. The proposed technique reduces the amount of short circuit power dissipation in the domino gate by 70% compared to the conventional keeper technique. Also the total power-delay product is 26% lower compared to the previously reported techniques. The process tracking capability of the design enables the domino gate to achieve uniform delay across different process corners. This reduces the amount of short circuit power dissipation that occurs in the cascaded domino gates by 90%. The use of the proposed technique in the read path of a register file reduces the energy requirement by 26% as compared to the other keeper techniques. The proposed technique has been prototyped in 130nm CMOS technology.

Stabilizing a pulsed field emission from an array of carbon nanotubes

In this paper, we propose a new design configuration for a carbon nanotube (CNT) array based pulsed field emission device to stabilize the field emission current. In the new design, we consider a pointed height distribution of the carbon nanotube array under a diode configuration with two side gates maintained at a negative potential to obtain a highly intense beam of electrons localized at the center of the array. The randomly oriented CNTs are assumed to be grown on a metallic substrate in the form of a thin film. A model of field emission from an array of CNTs under diode configuration was proposed and validated by experiments. Despite high output, the current in such a thin film device often decays drastically. The present paper is focused on understanding this problem. The random orientation of the CNTs and the electromechanical interaction are modeled to explain the self-assembly. The degraded state of the CNTs and the electromechanical force are employed to update the orientation of the CNTs. Pulsed field emission current at the device scale is finally obtained by using the Fowler-Nordheim equation by considering a dynamic electric field across the cathode and the anode and integration of current densities over the computational cell surfaces on the anode side. Furthermore we compare the subsequent performance of the pointed array with the conventionally used random and uniform arrays and show that the proposed design outperforms the conventional designs by several orders of magnitude. Based on the developed model, numerical simulations aimed at understanding the effects of various geometric parameters and their statistical features on the device current history are reported.

Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization

With extensive use of dynamic voltage scaling (DVS) there is increasing need for voltage scalable models. Similarly, leakage being very sensitive to temperature motivates the need for a temperature scalable model as well. We characterize standard cell libraries for statistical leakage analysis based on models for transistor stacks. Modeling stacks has the advantage of using a single model across many gates there by reducing the number of models that need to be characterized. Our experiments on 15 different gates show that we needed only 23 models to predict the leakage across 126 input vector combinations. We investigate the use of neural networks for the combined PVT model, for the stacks, which can capture the effect of inter die, intra gate variations, supply voltage(0.6-1.2 V) and temperature (0 - 100degC) on leakage. Results show that neural network based stack models can predict the PDF of leakage current across supply voltage and temperature accurately with the average error in mean being less than 2% and that in standard deviation being less than 5% across a range of voltage, temperature.

Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations

We investigate the feasibility of developing a comprehensive gate delay and slew models which incorporates output load, input edge slew, supply voltage, temperature, global process variations and local process variations all in the same model. We find that the standard polynomial models cannot handle such a large heterogeneous set of input variables. We instead use neural networks, which are well known for their ability to approximate any arbitrary continuous function. Our initial experiments with a small subset of standard cell gates of an industrial 65 nm library show promising results with error in mean less than 1%, error in standard deviation less than 3% and maximum error less than 11% as compared to SPICE for models covering 0.9- 1.1 V of supply, -40degC to 125degC of temperature, load, slew and global and local process parameters. Enhancing the conventional libraries to be voltage and temperature scalable with similar accuracy requires on an average 4x more SPICE characterization runs.

Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations

We investigate the feasibility of developing a comprehensive gate delay and slew models which incorporates output load, input edge slew, supply voltage, temperature, global process variations and local process variations all in the same model. We find that the standard polynomial models cannot handle such a large heterogeneous set of input variables. We instead use neural networks, which are well known for their ability to approximate any arbitrary continuous function. Our initial experiments with a small subset of standard cell gates of an industrial 65 nm library show promising results with error in mean less than 1%, error in standard deviation less than 3% and maximum error less than 11% as compared to SPICE for models covering 0.9- 1.1 V of supply, -40degC to 125degC of temperature, load, slew and global and local process parameters. Enhancing the conventional libraries to be voltage and temperature scalable with similar accuracy requires on an average 4x more SPICE characterization runs.

Generation of Minimum Leakage Input Vectors with Constrained NBTI Degradation

Technology scaling has caused Negative Bias Temperature Instability (NBTI) to emerge as a major circuit reliability concern. Simultaneously leakage power is becoming a greater fraction of the total power dissipated by logic circuits. As both NBTI and leakage power are highly dependent on vectors applied at the circuit’s inputs, they can be minimized by applying carefully chosen input vectors during periods when the circuit is in standby or idle mode. Unfortunately input vectors that minimize leakage power are not the ones that minimize NBTI degradation, so there is a need for a methodology to generate input vectors that minimize both of these variables.This paper proposes such a systematic methodology for the generation of input vectors which minimize leakage power under the constraint that NBTI degradation does not exceed a specified limit. These input vectors can be applied at the primary inputs of a circuit when it is in standby/idle mode and are such that the gates dissipate only a small amount of leakage power and also allow a large majority of the transistors on critical paths to be in the “recovery” phase of NBTI degradation. The advantage of this methodology is that allowing circuit designers to constrain NBTI degradation to below a specified limit enables tighter guardbanding, increasing performance. Our methodology guarantees that the generated input vector dissipates the least leakage power among all the input vectors that satisfy the degradation constraint. We formulate the problem as a zero-one integer linear program and show that this formulation produces input vectors whose leakage power is within 1% of a minimum leakage vector selected by a search algorithm and simultaneously reduces NBTI by about 5.75% of maximum circuit delay as compared to the worst case NBTI degradation. Our paper also proposes two new algorithms for the identification of circuit paths that are affected the most by NBTI degradation. The number of such paths identified by our algorithms are an order of magnitude fewer than previously proposed heuristics.

New possibilities in amplitude- and phase-comparison techniques for distance relays

The paper reports further work on the amplitude-comparison technique described by the same authors in a previous paper. This technique is extended to develop improved polar characteristics. Discontinuous polar characteristics, like directional parallelograms, are obtained by a single measuring gate with a simple mode of relay circuitry, whereas two measuring gates are required to provide a directional-quadrilateral characteristic of potentially general application. The paper also describes some new possibilities in phase-comparison methods for distance-protection schemes. Comparator models which effect the amplitude and phase comparison of the relaying signals are described in their schematic form. A comprehensive theoretical basis for comparison is also presented.

Algorithmic approach to simulate Hamiltonian dynamics and an NMR simulation of quantum state transfer

We propose an iterative algorithm to simulate the dynamics generated by any n-qubit Hamiltonian. The simulation entails decomposing the unitary time evolution operator U (unitary) into a product of different time-step unitaries. The algorithm product-decomposes U in a chosen operator basis by identifying a certain symmetry of U that is intimately related to the number of gates in the decomposition. We illustrate the algorithm by first obtaining a polynomial decomposition in the Pauli basis of the n-qubit quantum state transfer unitary by Di Franco et al. [Phys. Rev. Lett. 101, 230502 (2008)] that transports quantum information from one end of a spin chain to the other, and then implement it in nuclear magnetic resonance to demonstrate that the decomposition is experimentally viable. We further experimentally test the resilience of the state transfer to static errors in the coupling parameters of the simulated Hamiltonian. This is done by decomposing and simulating the corresponding imperfect unitaries.