994 resultados para Soi


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A 2 x 2 thermo-optic (TO) Mach-Zehnder (MZ) switch based on silicon waveguides with large cross section was designed and fabricated on silicon-on-insulator (SOI) wafer. The multi-mode interferometers (MMI) were used as power splitter and combiner in MZ structure. In order to get smooth interface, anisotropy chemical wet-etching of silicon was used to fabricate the waveguides instead of dry-etching. Additional grooves were introduced to reduce power consumption. The device has a low switching power of 235 mW and a switching speed of 60 mus. (C) 2004 Elsevier B.V. All rights reserved.

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A rearrangeable nonblocking 4 x 4 thermooptic silicon-on-insulator waveguide switch matrix at 1.55-mu m integrated spot size converters is designed and fabricated for the first time. The insertion losses and polarization-dependent losses of the four channels are less than 10 and 0.8 dB, respectively. The extinction ratios are larger than 20 dB. The response times are 4.6 mu s for rising edge and 1.9 mu s for failing edge.

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A folding rearrangeable nonblocking 4 x 4 optical matrix switch was designed and fabricated on silicon-on-insulator wafer. To compress chip size, switch elements (SEs) were interconnected by total internal reflection (TIR) mirrors instead of conventional S-bends. For obtaining smooth interfaces, potassium hydroxide anisotropic chemical etching of silicon was utilized to make the matrix switch for the first time. The device has a compact size of 20 x 1.6 mm(2) and a fast response of 7.5 mu s. The power consumption of each 2 x 2 SE and the average excess loss per mirror were 145 mW and -1.1 dB, respectively. Low path dependence of +/- 0.7 dB in total excess loss was obtained because of the symmetry of propagation paths in this novel matrix switch.

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A 4 x 4 strictly nonblocking thermo-optical switch matrix based on Mach-Zehnder (MZ) switching unit was designed and fabricated in silicon-on-insulator (SOI) wafer. The paired multi-mode interferometers (MMI) were used as power splitters and combiners in MZ structures. The device presents an average insertion loss of 17 dB and an average crosstalk of 16.5 dB. The power consumption needed for operation is reduced to 0.288 W by adding isolating trenches. The switching time of the device is about 15 mu s, which is much faster than that of silica-based switches. (C) 2005 Elsevier B.V. All rights reserved.

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SOI (silicon-on-insulator) is a new material with a lot of important performances such as large index difference, low transmission loss. Fabrication processes for SOI based optoelectronic devices are compatible with conventional IC processes. Having the potential of OEIC monolithic integration, SOI based optoelectronic devices have shown many good characteristics and become more and more attractive recently. In this paper, the recent progresses of SOI waveguide devices in our research group are presented. By highly effective numerical simulation, the single mode conditions for SOI rib waveguides with rectangular and trapezoidal cross-section were accurately investigated. Using both chemical anisotropic wet etching and plasma dry etching techniques, SOI single mode rib waveguide, MMI coupler, VOA (variable optical attenuator), 2X2 thermal-optical switch were successfully designed and fabricated. Based on these, 4X4 and 8X8 SOI optical waveguide integrated switch matrixes are demonstrated for the first time.

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An arrayed waveguide grating based on SOI material was fabricated by inductive coupled plasma (ICP) etching technology. The central wavelength of the device was designed at 1.5509 mu m and the channel spacing was 200 GHz. Comparing with the values of the design, the differences of the central wavelength and the channel spacing in the test were 0.28 nm and 0.02 nm, respectively. The adjacent channel crosstalk was about 10 dB, and the uniformity of the five channels' insertion loss was only 0.7 dB. The results show that the device can be used as a demultiplexer.

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A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.

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The effects, caused by the process of the implantation of nitrogen in the buried oxide layer of SIMOX wafer, on the characteristics of partially depleted silicon-on-insulator nMOSFET have been studied. The experimental results show that the channel electron mobilities of the devices fabricated on the SIMON (separation by implanted oxygen and nitrogen) wafers are lower than those of the devices made on the SIMOX (separation by implanted oxygen) wafers. The devices corresponding to the lowest implantation dose have the lowest mobility within the range of the implantation dose given in this paper. The value of the channel electron mobility rises slightly and tends to a limit when the implantation dose becomes greater. This is explained in terms of the rough Si/SiO2 interface due to the process of implantation of nitrogen. The increasing negative shifts of the threshold voltages for the devices fabricated on the SIMON wafers are also observed with the increase of implanting dose of nitrogen. However, for the devices fabricated on the SIMON wafers with the lowest dose of implanted nitrogen in this paper, their threshold voltages are slightly larger on the average than those prepared on the SIMOX wafers. The shifts are considered to be due to the increment of the fixed oxide charge in SiO2 layer and the change of the density of the interface-trapped charge with the value and distribution included. In particular, the devices fabricated on the SIMON wafers show a weakened kink effect, compared to the ones made on the SIMOX wafers.

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Straight single-line defect optical waveguides in photonic crystal slabs are designed by the plane wave expansion method and fabricated into silicon-on-insulator (SOI) wafer by 248-nm deep UV lithography. We present an efficient way to measure the light transmission spectrum of the photonic crystal waveguide (PhC WG) at given polarization states. By employing the Mueller/Stokes method, we measure and analyse the light propagation properties of the PhC WG at different polarized states. It is shown that experimental results are in agreement with the simulation results of the three-dimensional finite-difference-time-domain method.

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A 16 x 16 thermo-optic wavelenght switch matrix has been designed and febricated on silicon-on-insulator wafer. For reducing device lenght, blocking switch matrix configuration is chosen. The building block of a matix is a 2 x 2 cell with Mach-Zehnder interferometer configuration, where a multi-mode interferometer serves as splitters/combiners. Spot size converters and isolating grooves are integrated on the same chip to reduce loss and power consumption. Average power consumption of the switch cell is 220 mW. The switching time of a switch cell is less than 3 mu s.

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A compact eight-channel flat spectral response arrayed waveguide grating (AWG) multiplexer based on siliconon-insulator (SOI) materials has been fabricated on the planar lightwave circuit (PLC). The 1-dB bandwidth of 48 GHz and 3-dB bandwidth of 69 GHz are obtained for the 100 GHz channel spacing. Not only non-adjacent crosstalk but also adjacent crosstalk are less than -25 dB. The on-chip propagation loss range is from 3.5 to 3.9 dB, and the 2 total device size is 1.5 x 1.0 cm(2). (c) 2005 Elsevier B.V. All rights reserved.

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In this paper, we report the fabrication of Si-based double hetero-epitaxial SOI materials Si/gamma-Al2O3/Si. First, single crystalline gamma-Al2O3 (100) insulator films were grown epitaxially on Si(100) by LPCVD, and then, Si(100) epitaxial films were grown on gamma-Al2O3 (100)/Si(100) epi-substrates using a CVD method similar to silicon on sapphire (SOS) epitaxial growth. The Si/gamma-Al2O3 (100)/Si(100) SOI materials are characterized in detail by RHEED, XRD and AES techniques. The results demonstrate that the device-quality novel SOI materials Si/gamma-Al2O3 (100)/Si(100) has been fabricated successfully and can be used for application of MOS device.

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A simple method based on the effective index method was used to estimate the minimum bend radii of curved SOI waveguides. An analytical formula was obtained to estimate the minimum radius of curvature at which the mode becomes cut off due to the side radiative loss.

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Submicrometer channel and rib waveguides based on SOI (Silicon-On-Insulator) have been designed and fabricated with electron-beam lithography and inductively coupled plasma dry etching. Propagation loss of 8.39dB/mm was measured using the cut-back method. Based on these so-called nanowire waveguides, we have also demonstrated some functional components with small dimensions, including sharp 90 degrees bends with radius of a few micrometers, T-branches, directional couplers and multimode interferometer couplers.

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We present detailed design, fabrication, and characterization issues of submicron rib waveguides based on silicon-on-insulator. The waveguides fabricated by EBL and ICP processes have propagation loss of 1.8dB/mm and bend loss of 0.14dB/90 degrees for bends with radius of 5 mu m.